Allow platform modules to set the size of large pizes, as potentially
discovered from firmware, and better handle highly-discontiguous memory and CPU maps. MFC after: 3 weeks
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@ -572,8 +572,10 @@ moea64_probe_large_page(void)
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/* FALLTHROUGH */
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default:
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moea64_large_page_size = 0x1000000; /* 16 MB */
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moea64_large_page_shift = 24;
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if (moea64_large_page_size == 0) {
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moea64_large_page_size = 0x1000000; /* 16 MB */
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moea64_large_page_shift = 24;
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}
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}
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moea64_large_page_mask = moea64_large_page_size - 1;
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@ -873,9 +875,9 @@ moea64_late_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend
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/*
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* Calculate the last available physical address.
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*/
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Maxmem = 0;
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for (i = 0; phys_avail[i + 2] != 0; i += 2)
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;
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Maxmem = powerpc_btop(phys_avail[i + 1]);
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Maxmem = max(Maxmem, powerpc_btop(phys_avail[i + 1]));
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/*
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* Initialize MMU and remap early physical mappings
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@ -956,7 +958,7 @@ moea64_late_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend
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pa += PAGE_SIZE;
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va += PAGE_SIZE;
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}
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dpcpu_init(dpcpu, 0);
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dpcpu_init(dpcpu, curcpu);
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/*
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* Allocate some things for page zeroing. We put this directly
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