Optimise reading of pending interrupt registers. If there are no
pending interrupt bits, skip the bit iteration loop. Reviewed by: ian @
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@ -60,6 +60,7 @@ __FBSDID("$FreeBSD$");
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#define BANK1_END (BANK1_START + 32 - 1)
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#define BANK2_START (BANK1_START + 32)
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#define BANK2_END (BANK2_START + 32 - 1)
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#define BANK3_START (BANK2_START + 32)
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#define IS_IRQ_BASIC(n) (((n) >= 0) && ((n) < BANK1_START))
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#define IS_IRQ_BANK1(n) (((n) >= BANK1_START) && ((n) <= BANK1_END))
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@ -150,29 +151,36 @@ arm_get_next_irq(int last_irq)
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/* Sanity check */
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if (irq < 0)
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irq = 0;
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/* TODO: should we mask last_irq? */
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pending = intc_read_4(INTC_PENDING_BASIC);
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while (irq < BANK1_START) {
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if (pending & (1 << irq))
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return irq;
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irq++;
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if (irq < BANK1_START) {
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pending = intc_read_4(INTC_PENDING_BASIC);
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if ((pending & 0xFF) == 0) {
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irq = BANK1_START; /* skip to next bank */
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} else do {
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if (pending & (1 << irq))
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return irq;
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irq++;
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} while (irq < BANK1_START);
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}
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pending = intc_read_4(INTC_PENDING_BANK1);
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while (irq < BANK2_START) {
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if (pending & (1 << IRQ_BANK1(irq)))
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return irq;
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irq++;
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if (irq < BANK2_START) {
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pending = intc_read_4(INTC_PENDING_BANK1);
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if (pending == 0) {
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irq = BANK2_START; /* skip to next bank */
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} else do {
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if (pending & (1 << IRQ_BANK1(irq)))
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return irq;
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irq++;
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} while (irq < BANK2_START);
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}
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pending = intc_read_4(INTC_PENDING_BANK2);
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while (irq <= BANK2_END) {
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if (pending & (1 << IRQ_BANK2(irq)))
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return irq;
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irq++;
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if (irq < BANK3_START) {
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pending = intc_read_4(INTC_PENDING_BANK2);
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if (pending != 0) do {
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if (pending & (1 << IRQ_BANK2(irq)))
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return irq;
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irq++;
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} while (irq < BANK3_START);
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}
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return (-1);
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}
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