From 5c7269aca44a0d42797649d9fd55125272776ac7 Mon Sep 17 00:00:00 2001 From: Oleksandr Tymoshenko Date: Wed, 27 Feb 2013 08:32:34 +0000 Subject: [PATCH] - Initialize GPIO_OE register based on pinmux configuration Although AM335x TRM states that GPIO_OE register is not used and just reflects pads configuration in practice it does control pin behavior and shoiuld be set in addition to pinmux setup --- sys/arm/ti/ti_gpio.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/sys/arm/ti/ti_gpio.c b/sys/arm/ti/ti_gpio.c index 58de5165a022..aa9bb8ee226b 100644 --- a/sys/arm/ti/ti_gpio.c +++ b/sys/arm/ti/ti_gpio.c @@ -653,6 +653,9 @@ ti_gpio_attach(device_t dev) struct ti_gpio_softc *sc = device_get_softc(dev); unsigned int i; int err = 0; + int pin; + uint32_t flags; + uint32_t reg_oe; sc->sc_dev = dev; @@ -720,6 +723,17 @@ ti_gpio_attach(device_t dev) /* Disable interrupts for all pins */ ti_gpio_write_4(sc, i, TI_GPIO_CLEARIRQENABLE1, 0xffffffff); ti_gpio_write_4(sc, i, TI_GPIO_CLEARIRQENABLE2, 0xffffffff); + + /* Init OE registger based on pads configuration */ + reg_oe = 0xffffffff; + for (pin = 0; pin < 32; pin++) { + ti_scm_padconf_get_gpioflags( + PINS_PER_BANK*i + pin, &flags); + if (flags & GPIO_PIN_OUTPUT) + reg_oe &= ~(1U << pin); + } + + ti_gpio_write_4(sc, i, TI_GPIO_OE, reg_oe); } }