Lines were a bit too long. Wrap some of them to 60 columns.
Suggested by: bjk@ MFC after: 3 days
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@ -28,7 +28,7 @@
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.\"
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.\" $FreeBSD$
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.\"
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.Dd June 1, 2012
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.Dd June 4, 2012
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.Dt BCE 4
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.Os
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.Sh NAME
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@ -213,45 +213,58 @@ Enable/Disable strict RX frame size checking (default 0).
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Enable/Disable frame header/payload splitting (default 1).
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.It Va hw.bce.rx_pages
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Set the number of memory pages assigned to recieve packets by the driver.
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Due to alignment issues, this value can only be of the set 1, 2, 4 or 8 (default 2).
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Due to alignment issues, this value can only be of the set
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1, 2, 4 or 8 (default 2).
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.It Va hw.bce.tx_pages
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Set the number of memory pages assigned to transmit packets by the driver.
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Due to alignment issues, this value can only be of the set 1, 2, 4 or 8 (default 2).
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Set the number of memory pages assigned to transmit packets
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by the driver.
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Due to alignment issues, this value can only be of the set
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1, 2, 4 or 8 (default 2).
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.It Va hw.bce.rx_ticks
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Time in microsecond ticks to wait before generating a status block updates due to RX processing activity.
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Time in microsecond ticks to wait before generating a status
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block updates due to RX processing activity.
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Values from 0-100 are valid.
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A value of 0 disables this status block update.
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Cannot be set to 0 if hw.bce.rx_quick_cons_trip is also 0 (default 18).
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Cannot be set to 0 if hw.bce.rx_quick_cons_trip is also 0
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(default 18).
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.It Va hw.bce.rx_ticks_int
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Time in microsecond ticks to wait during RX interrupt processing before generating a status block update.
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Time in microsecond ticks to wait during RX interrupt
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processing before generating a status block update.
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Values from 0-100 are valid.
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Valid values are in the range from 0-100.
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A value of 0 disables this status block update (default 18).
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.It Va hw.bce.rx_quick_cons_trip
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Number of RX Quick BD Chain entries that must be completed before a status block is generated.
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Number of RX Quick BD Chain entries that must be completed
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before a status block is generated.
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Values from 0-256 are valid.
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A value of 0 disables this status block update.
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Cannot be set to 0 if hw.bce.rx_ticks is also 0 (default 6).
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.It Va hw.bce.rx_quick_cons_trip_int
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Number of RX quick BD entries that must be completed before a status block is generated duing interrupt processing.
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Number of RX quick BD entries that must be completed before
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a status block is generated duing interrupt processing.
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Values from 0-256 are valid.
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A value of 0 disables this status block update (default 6).
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.It Va hw.bce.tx_ticks
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Time in microsecond ticks to wait before a status block update is generated due to TX activitiy.
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Time in microsecond ticks to wait before a status block
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update is generated due to TX activitiy.
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Values from 0-100 are valid.
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A value of 0 disables this status block update.
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Cannot be set to 0 if hw.bce.tx_quick_cons_trip is also 0 (default 80).
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Cannot be set to 0 if hw.bce.tx_quick_cons_trip is also 0
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(default 80).
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.It Va hw.bce.tx_ticks_int
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Time in microsecond ticks to wait in interrupt processing before a status block update is generated due to TX activity
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Time in microsecond ticks to wait in interrupt processing
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before a status block update is generated due to TX activity
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Values from 0-100 are valid.
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A value of 0 disables this status block update (default 80).
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.It Va hw.bce.tx_cons_trip
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How many TX Quick BD Chain entries that must be completed before a status block is generated.
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How many TX Quick BD Chain entries that must be completed
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before a status block is generated.
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Values from 0-100 are valid.
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A value of 0 disables this status block update.
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Cannot be set to 0 if hw.bce.tx_ticks is also 0 (default 20).
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.It Va hw.bce.tx_cons_trip_int
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How many TX Quick BD Chain entries that must be completed before a status block is generated during an interrupt.
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How many TX Quick BD Chain entries that must be completed
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before a status block is generated during an interrupt.
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Values from 0-100 are valid.
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A value of 0 disables this status block update (default 20).
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.El
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