Configure CPU window to second CESA SRAM
Check if there is a second CESA SRAM node in FDT and add a CPU window for it. Define A38X specific macro for setting device attribute for each node. Submitted by: Michal Stanek <mst@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D6216
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@ -2107,6 +2107,37 @@ moveon:
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return (EINVAL);
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cpu_win_tbl[t].target = MV_WIN_CESA_TARGET;
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#ifdef SOC_MV_ARMADA38X
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cpu_win_tbl[t].attr = MV_WIN_CESA_ATTR(0);
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#else
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cpu_win_tbl[t].attr = MV_WIN_CESA_ATTR(1);
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#endif
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cpu_win_tbl[t].base = sram_base;
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cpu_win_tbl[t].size = sram_size;
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cpu_win_tbl[t].remap = ~0;
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cpu_wins_no++;
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debugf("sram: base = 0x%0lx size = 0x%0lx\n", sram_base, sram_size);
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/* Check if there is a second CESA node */
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while ((node = OF_peer(node)) != 0) {
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if (fdt_is_compatible(node, "mrvl,cesa-sram")) {
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if (fdt_regsize(node, &sram_base, &sram_size) != 0)
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return (EINVAL);
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break;
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}
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}
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if (node == 0)
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return (0);
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t++;
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if (t >= ((sizeof(cpu_win_tbl))/(sizeof(cpu_win_tbl[0])))) {
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debugf("cannot fit CESA tuple into cpu_win_tbl\n");
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return (ENOMEM);
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}
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/* Configure window for CESA1 */
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cpu_win_tbl[t].target = MV_WIN_CESA_TARGET;
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cpu_win_tbl[t].attr = MV_WIN_CESA_ATTR(1);
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cpu_win_tbl[t].base = sram_base;
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cpu_win_tbl[t].size = sram_size;
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@ -233,6 +233,19 @@
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* 2: engine0
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*/
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#define MV_WIN_CESA_ATTR(eng_sel) (1 | ((eng_sel) << 2))
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#elif defined(SOC_MV_ARMADA38X)
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#define MV_WIN_CESA_TARGET 9
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/*
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* Bits [1:0] = Data swapping
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* 0x0 = Byte swap
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* 0x1 = No swap
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* 0x2 = Byte and word swap
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* 0x3 = Word swap
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* Bits [4:2] = CESA select:
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* 0x6 = CESA0
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* 0x5 = CESA1
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*/
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#define MV_WIN_CESA_ATTR(eng_sel) (0x11 | (1 << (3 - (eng_sel))))
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#else
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#define MV_WIN_CESA_TARGET 3
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#define MV_WIN_CESA_ATTR(eng_sel) 0
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