diff --git a/sys/amd64/amd64/apic_vector.S b/sys/amd64/amd64/apic_vector.S index 05cf19087938..72dab845445f 100644 --- a/sys/amd64/amd64/apic_vector.S +++ b/sys/amd64/amd64/apic_vector.S @@ -1,6 +1,6 @@ /* * from: vector.s, 386BSD 0.1 unknown origin - * $Id: apic_vector.s,v 1.26 1998/03/03 20:55:24 tegge Exp $ + * $Id: apic_vector.s,v 1.27 1998/03/03 22:56:28 tegge Exp $ */ @@ -913,21 +913,6 @@ imasks: /* masks for interrupt handlers */ .long SWI_VM_MASK, 0 .long SWI_CLOCK_MASK, SWI_AST_MASK -/* - * IDT vector entry points for the HWIs. - * - * used by: - * i386/isa/clock.c: setup Xintr8254 - */ - .globl _ivectors -_ivectors: - .long _Xintr0, _Xintr1, _Xintr2, _Xintr3 - .long _Xintr4, _Xintr5, _Xintr6, _Xintr7 - .long _Xintr8, _Xintr9, _Xintr10, _Xintr11 - .long _Xintr12, _Xintr13, _Xintr14, _Xintr15 - .long _Xintr16, _Xintr17, _Xintr18, _Xintr19 - .long _Xintr20, _Xintr21, _Xintr22, _Xintr23 - /* active flag for lazy masking */ iactive: .long 0 diff --git a/sys/amd64/amd64/tsc.c b/sys/amd64/amd64/tsc.c index 4388c9726318..323610357e4f 100644 --- a/sys/amd64/amd64/tsc.c +++ b/sys/amd64/amd64/tsc.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.113 1998/02/23 00:11:25 bde Exp $ + * $Id: clock.c,v 1.114 1998/02/28 21:16:13 phk Exp $ */ /* @@ -87,6 +87,9 @@ #ifdef SMP #define disable_intr() CLOCK_DISABLE_INTR() #define enable_intr() CLOCK_ENABLE_INTR() + +/* The interrupt triggered by the 8254 (timer) chip */ +int apic_8254_intr; #endif /* SMP */ /* @@ -949,15 +952,12 @@ cpu_initclocks() else panic("neither pin 0 or pin 2 works for 8254"); - /* setup the vectors */ - vec[x] = (u_int)vec8254; - Xintr8254 = (u_int)ivectors[x]; - mask8254 = (1 << x); + apic_8254_intr = x; register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0, /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); - INTREN(mask8254); + INTREN(1 << x); #else /* APIC_IO */ diff --git a/sys/amd64/include/clock.h b/sys/amd64/include/clock.h index 72c159063bba..c21229b998cd 100644 --- a/sys/amd64/include/clock.h +++ b/sys/amd64/include/clock.h @@ -3,7 +3,7 @@ * Garrett Wollman, September 1994. * This file is in the public domain. * - * $Id: clock.h,v 1.32 1998/02/20 16:35:27 phk Exp $ + * $Id: clock.h,v 1.33 1998/02/25 02:20:30 bde Exp $ */ #ifndef _MACHINE_CLOCK_H_ @@ -21,6 +21,9 @@ extern u_int timer_freq; extern int timer0_max_count; extern u_int tsc_freq; extern int wall_cmos_clock; +#ifdef APIC_IO +extern int apic_8254_intr; +#endif /* * Driver to clock driver interface. diff --git a/sys/amd64/include/smp.h b/sys/amd64/include/smp.h index d921d2356db2..d40a9336253a 100644 --- a/sys/amd64/include/smp.h +++ b/sys/amd64/include/smp.h @@ -6,7 +6,7 @@ * this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp * ---------------------------------------------------------------------------- * - * $Id: smp.h,v 1.37 1998/03/03 20:55:23 tegge Exp $ + * $Id: smp.h,v 1.38 1998/03/03 22:56:26 tegge Exp $ * */ @@ -75,20 +75,13 @@ int try_mpintrlock __P((void)); #endif /* RECURSIVE_MPINTRLOCK */ /* global data in apic_vector.s */ -extern u_int ivectors[]; extern volatile u_int stopped_cpus; extern volatile u_int started_cpus; extern unsigned int checkstate_probed_cpus; extern unsigned int checkstate_need_ast; -/* global data in apic_ipl.s */ -extern u_int vec[]; -extern u_int Xintr8254; -extern u_int mask8254; - /* functions in apic_ipl.s */ -void vec8254 __P((void)); void apic_eoi __P((void)); u_int io_apic_read __P((int, int)); void io_apic_write __P((int, int, u_int)); diff --git a/sys/amd64/isa/clock.c b/sys/amd64/isa/clock.c index 4388c9726318..323610357e4f 100644 --- a/sys/amd64/isa/clock.c +++ b/sys/amd64/isa/clock.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.113 1998/02/23 00:11:25 bde Exp $ + * $Id: clock.c,v 1.114 1998/02/28 21:16:13 phk Exp $ */ /* @@ -87,6 +87,9 @@ #ifdef SMP #define disable_intr() CLOCK_DISABLE_INTR() #define enable_intr() CLOCK_ENABLE_INTR() + +/* The interrupt triggered by the 8254 (timer) chip */ +int apic_8254_intr; #endif /* SMP */ /* @@ -949,15 +952,12 @@ cpu_initclocks() else panic("neither pin 0 or pin 2 works for 8254"); - /* setup the vectors */ - vec[x] = (u_int)vec8254; - Xintr8254 = (u_int)ivectors[x]; - mask8254 = (1 << x); + apic_8254_intr = x; register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0, /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); - INTREN(mask8254); + INTREN(1 << x); #else /* APIC_IO */ diff --git a/sys/i386/i386/apic_vector.s b/sys/i386/i386/apic_vector.s index 05cf19087938..72dab845445f 100644 --- a/sys/i386/i386/apic_vector.s +++ b/sys/i386/i386/apic_vector.s @@ -1,6 +1,6 @@ /* * from: vector.s, 386BSD 0.1 unknown origin - * $Id: apic_vector.s,v 1.26 1998/03/03 20:55:24 tegge Exp $ + * $Id: apic_vector.s,v 1.27 1998/03/03 22:56:28 tegge Exp $ */ @@ -913,21 +913,6 @@ imasks: /* masks for interrupt handlers */ .long SWI_VM_MASK, 0 .long SWI_CLOCK_MASK, SWI_AST_MASK -/* - * IDT vector entry points for the HWIs. - * - * used by: - * i386/isa/clock.c: setup Xintr8254 - */ - .globl _ivectors -_ivectors: - .long _Xintr0, _Xintr1, _Xintr2, _Xintr3 - .long _Xintr4, _Xintr5, _Xintr6, _Xintr7 - .long _Xintr8, _Xintr9, _Xintr10, _Xintr11 - .long _Xintr12, _Xintr13, _Xintr14, _Xintr15 - .long _Xintr16, _Xintr17, _Xintr18, _Xintr19 - .long _Xintr20, _Xintr21, _Xintr22, _Xintr23 - /* active flag for lazy masking */ iactive: .long 0 diff --git a/sys/i386/i386/tsc.c b/sys/i386/i386/tsc.c index 4388c9726318..323610357e4f 100644 --- a/sys/i386/i386/tsc.c +++ b/sys/i386/i386/tsc.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.113 1998/02/23 00:11:25 bde Exp $ + * $Id: clock.c,v 1.114 1998/02/28 21:16:13 phk Exp $ */ /* @@ -87,6 +87,9 @@ #ifdef SMP #define disable_intr() CLOCK_DISABLE_INTR() #define enable_intr() CLOCK_ENABLE_INTR() + +/* The interrupt triggered by the 8254 (timer) chip */ +int apic_8254_intr; #endif /* SMP */ /* @@ -949,15 +952,12 @@ cpu_initclocks() else panic("neither pin 0 or pin 2 works for 8254"); - /* setup the vectors */ - vec[x] = (u_int)vec8254; - Xintr8254 = (u_int)ivectors[x]; - mask8254 = (1 << x); + apic_8254_intr = x; register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0, /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); - INTREN(mask8254); + INTREN(1 << x); #else /* APIC_IO */ diff --git a/sys/i386/include/clock.h b/sys/i386/include/clock.h index 72c159063bba..c21229b998cd 100644 --- a/sys/i386/include/clock.h +++ b/sys/i386/include/clock.h @@ -3,7 +3,7 @@ * Garrett Wollman, September 1994. * This file is in the public domain. * - * $Id: clock.h,v 1.32 1998/02/20 16:35:27 phk Exp $ + * $Id: clock.h,v 1.33 1998/02/25 02:20:30 bde Exp $ */ #ifndef _MACHINE_CLOCK_H_ @@ -21,6 +21,9 @@ extern u_int timer_freq; extern int timer0_max_count; extern u_int tsc_freq; extern int wall_cmos_clock; +#ifdef APIC_IO +extern int apic_8254_intr; +#endif /* * Driver to clock driver interface. diff --git a/sys/i386/include/smp.h b/sys/i386/include/smp.h index d921d2356db2..d40a9336253a 100644 --- a/sys/i386/include/smp.h +++ b/sys/i386/include/smp.h @@ -6,7 +6,7 @@ * this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp * ---------------------------------------------------------------------------- * - * $Id: smp.h,v 1.37 1998/03/03 20:55:23 tegge Exp $ + * $Id: smp.h,v 1.38 1998/03/03 22:56:26 tegge Exp $ * */ @@ -75,20 +75,13 @@ int try_mpintrlock __P((void)); #endif /* RECURSIVE_MPINTRLOCK */ /* global data in apic_vector.s */ -extern u_int ivectors[]; extern volatile u_int stopped_cpus; extern volatile u_int started_cpus; extern unsigned int checkstate_probed_cpus; extern unsigned int checkstate_need_ast; -/* global data in apic_ipl.s */ -extern u_int vec[]; -extern u_int Xintr8254; -extern u_int mask8254; - /* functions in apic_ipl.s */ -void vec8254 __P((void)); void apic_eoi __P((void)); u_int io_apic_read __P((int, int)); void io_apic_write __P((int, int, u_int)); diff --git a/sys/i386/isa/apic_ipl.s b/sys/i386/isa/apic_ipl.s index bc38b47c45fe..f2579ed7d288 100644 --- a/sys/i386/isa/apic_ipl.s +++ b/sys/i386/isa/apic_ipl.s @@ -22,7 +22,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $Id: apic_ipl.s,v 1.17 1997/12/15 02:18:33 tegge Exp $ + * $Id: apic_ipl.s,v 1.18 1998/03/03 22:56:28 tegge Exp $ */ @@ -37,15 +37,6 @@ _cil: .long 0 .globl _cml _cml: .long 0 -/* this allows us to change the 8254 APIC pin# assignment */ - .globl _Xintr8254 -_Xintr8254: - .long _Xintr7 - -/* used by this file, microtime.s and clock.c */ - .globl _mask8254 -_mask8254: - .long 0 /* * Routines used by splz_unpend to build an interrupt frame from a @@ -178,44 +169,6 @@ splz_swi: * set from the time of the original INT. */ -/* - * generic vector function for 8254 clock - */ - ALIGN_TEXT - - .globl _vec8254 -_vec8254: - popl %eax /* return address */ - pushfl - pushl $KCSEL - pushl %eax - movl _mask8254, %eax /* lazy masking */ - notl %eax - cli - lock /* MP-safe */ - andl %eax, iactive - MEXITCOUNT - APIC_ITRACE(apic_itrace_splz, 0, APIC_ITRACE_SPLZ) - movl _Xintr8254, %eax - jmp %eax /* XXX might need _Xfastintr# */ - - -/* - * generic vector function for RTC clock - */ - ALIGN_TEXT -vec8: - popl %eax - pushfl - pushl $KCSEL - pushl %eax - cli - lock /* MP-safe */ - andl $~IRQ_BIT(8), iactive /* lazy masking */ - MEXITCOUNT - APIC_ITRACE(apic_itrace_splz, 8, APIC_ITRACE_SPLZ) - jmp _Xintr8 /* XXX might need _Xfastintr8 */ - /* * The 'generic' vector stubs. */ @@ -243,7 +196,7 @@ __CONCAT(vec,irq_num): ; \ BUILD_VEC(5) BUILD_VEC(6) BUILD_VEC(7) - /* IRQ8 is special case, done above */ + BUILD_VEC(8) BUILD_VEC(9) BUILD_VEC(10) BUILD_VEC(11) diff --git a/sys/i386/isa/apic_vector.s b/sys/i386/isa/apic_vector.s index 05cf19087938..72dab845445f 100644 --- a/sys/i386/isa/apic_vector.s +++ b/sys/i386/isa/apic_vector.s @@ -1,6 +1,6 @@ /* * from: vector.s, 386BSD 0.1 unknown origin - * $Id: apic_vector.s,v 1.26 1998/03/03 20:55:24 tegge Exp $ + * $Id: apic_vector.s,v 1.27 1998/03/03 22:56:28 tegge Exp $ */ @@ -913,21 +913,6 @@ imasks: /* masks for interrupt handlers */ .long SWI_VM_MASK, 0 .long SWI_CLOCK_MASK, SWI_AST_MASK -/* - * IDT vector entry points for the HWIs. - * - * used by: - * i386/isa/clock.c: setup Xintr8254 - */ - .globl _ivectors -_ivectors: - .long _Xintr0, _Xintr1, _Xintr2, _Xintr3 - .long _Xintr4, _Xintr5, _Xintr6, _Xintr7 - .long _Xintr8, _Xintr9, _Xintr10, _Xintr11 - .long _Xintr12, _Xintr13, _Xintr14, _Xintr15 - .long _Xintr16, _Xintr17, _Xintr18, _Xintr19 - .long _Xintr20, _Xintr21, _Xintr22, _Xintr23 - /* active flag for lazy masking */ iactive: .long 0 diff --git a/sys/i386/isa/clock.c b/sys/i386/isa/clock.c index 4388c9726318..323610357e4f 100644 --- a/sys/i386/isa/clock.c +++ b/sys/i386/isa/clock.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.113 1998/02/23 00:11:25 bde Exp $ + * $Id: clock.c,v 1.114 1998/02/28 21:16:13 phk Exp $ */ /* @@ -87,6 +87,9 @@ #ifdef SMP #define disable_intr() CLOCK_DISABLE_INTR() #define enable_intr() CLOCK_ENABLE_INTR() + +/* The interrupt triggered by the 8254 (timer) chip */ +int apic_8254_intr; #endif /* SMP */ /* @@ -949,15 +952,12 @@ cpu_initclocks() else panic("neither pin 0 or pin 2 works for 8254"); - /* setup the vectors */ - vec[x] = (u_int)vec8254; - Xintr8254 = (u_int)ivectors[x]; - mask8254 = (1 << x); + apic_8254_intr = x; register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0, /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); - INTREN(mask8254); + INTREN(1 << x); #else /* APIC_IO */ diff --git a/sys/isa/atrtc.c b/sys/isa/atrtc.c index 4388c9726318..323610357e4f 100644 --- a/sys/isa/atrtc.c +++ b/sys/isa/atrtc.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.113 1998/02/23 00:11:25 bde Exp $ + * $Id: clock.c,v 1.114 1998/02/28 21:16:13 phk Exp $ */ /* @@ -87,6 +87,9 @@ #ifdef SMP #define disable_intr() CLOCK_DISABLE_INTR() #define enable_intr() CLOCK_ENABLE_INTR() + +/* The interrupt triggered by the 8254 (timer) chip */ +int apic_8254_intr; #endif /* SMP */ /* @@ -949,15 +952,12 @@ cpu_initclocks() else panic("neither pin 0 or pin 2 works for 8254"); - /* setup the vectors */ - vec[x] = (u_int)vec8254; - Xintr8254 = (u_int)ivectors[x]; - mask8254 = (1 << x); + apic_8254_intr = x; register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0, /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); - INTREN(mask8254); + INTREN(1 << x); #else /* APIC_IO */ diff --git a/sys/sys/smp.h b/sys/sys/smp.h index d921d2356db2..d40a9336253a 100644 --- a/sys/sys/smp.h +++ b/sys/sys/smp.h @@ -6,7 +6,7 @@ * this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp * ---------------------------------------------------------------------------- * - * $Id: smp.h,v 1.37 1998/03/03 20:55:23 tegge Exp $ + * $Id: smp.h,v 1.38 1998/03/03 22:56:26 tegge Exp $ * */ @@ -75,20 +75,13 @@ int try_mpintrlock __P((void)); #endif /* RECURSIVE_MPINTRLOCK */ /* global data in apic_vector.s */ -extern u_int ivectors[]; extern volatile u_int stopped_cpus; extern volatile u_int started_cpus; extern unsigned int checkstate_probed_cpus; extern unsigned int checkstate_need_ast; -/* global data in apic_ipl.s */ -extern u_int vec[]; -extern u_int Xintr8254; -extern u_int mask8254; - /* functions in apic_ipl.s */ -void vec8254 __P((void)); void apic_eoi __P((void)); u_int io_apic_read __P((int, int)); void io_apic_write __P((int, int, u_int));