diff --git a/lib/libpmc/libpmc.c b/lib/libpmc/libpmc.c
index 48f104ed2c66..cdde38618d27 100644
--- a/lib/libpmc/libpmc.c
+++ b/lib/libpmc/libpmc.c
@@ -1291,7 +1291,14 @@ p4_allocate_pmc(enum pmc_event pe, char *ctrspec,
  */
 
 static struct pmc_event_alias p5_aliases[] = {
-	EV_ALIAS("cycles", "tsc"),
+	EV_ALIAS("branches",		"p5-taken-branches"),
+	EV_ALIAS("cycles",		"tsc"),
+	EV_ALIAS("dc-misses",		"p5-data-read-miss-or-write-miss"),
+	EV_ALIAS("ic-misses",		"p5-code-cache-miss"),
+	EV_ALIAS("instructions",	"p5-instructions-executed"),
+	EV_ALIAS("interrupts",		"p5-hardware-interrupts"),
+	EV_ALIAS("unhalted-cycles",
+	    "p5-number-of-cycles-not-in-halt-state"),
 	EV_ALIAS(NULL, NULL)
 };
 
diff --git a/lib/libpmc/pmc.p5.3 b/lib/libpmc/pmc.p5.3
index aaf0a8f538cd..834732efa09e 100644
--- a/lib/libpmc/pmc.p5.3
+++ b/lib/libpmc/pmc.p5.3
@@ -380,6 +380,21 @@ The number of writes to non-cacheable memory, including write cycles
 caused by TLB misses and I/O writes.
 This event is only allocated on counter 1.
 .El
+.Ss Event Name Aliases
+The following table shows the mapping between the PMC-independent
+aliases supported by
+.Lb libpmc
+and the underlying hardware events used.
+.Bl -column "branch-mispredicts" "Description"
+.It Em Alias Ta Em Event
+.It Li branches Ta Li p5-taken-branches
+.It Li branch-mispredicts Ta Li (unsupported)
+.It Li dc-misses Ta Li p5-data-read-miss-or-write-miss
+.It Li ic-misses Ta Li p5-code-cache-miss
+.It Li instructions Ta Li p5-instructions-executed
+.It Li interrupts Ta Li p5-hardware-interrupts
+.It Li unhalted-cycles Ta Li p5-number-of-cycles-not-in-halt-state
+.El
 .Sh SEE ALSO
 .Xr pmc 3 ,
 .Xr pmc.k7 3 ,