MFC
This commit is contained in:
commit
5e9857e76b
@ -25,12 +25,12 @@
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.\"
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.\" $FreeBSD$
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.\"
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.Dd November 30, 2009
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.Dd June 7, 2011
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.Dt AMDSBWD 4
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.Os
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.Sh NAME
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.Nm amdsbwd
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.Nd device driver for the AMD SB600/SB700/SB710/SB750 watchdog timer
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.Nd device driver for the AMD SB600/SB7xx/SB8xx watchdog timers
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.Sh SYNOPSIS
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To compile this driver into the kernel,
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place the following line in your
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@ -51,7 +51,7 @@ The
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driver provides
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.Xr watchdog 4
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support for the watchdog timers present on
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AMD SB600 and SB7xx south bridge chips.
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AMD SB600, SB7xx and SB8xx southbridges.
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.Sh SEE ALSO
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.Xr watchdog 4 ,
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.Xr watchdog 8 ,
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|
@ -26,7 +26,7 @@
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.\"
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.\" $FreeBSD$
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.\"
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.Dd May 20, 2011
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.Dd January 29, 2008
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.Dt ATKBD 4
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.Os
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.Sh NAME
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@ -176,11 +176,6 @@ When this option is given, the
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.Nm
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driver will not test the keyboard port during the probe routine.
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Some machines hang during boot when this test is performed.
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.It bit 4 (PROBE_TYPEMATIC)
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When this option is given, the
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.Nm
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driver will try to probe the keyboard typematic rate on boot.
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Some machines hang during boot when this test is performed.
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.El
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.\".Sh FILES
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.Sh EXAMPLES
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|
@ -97,6 +97,7 @@ itetcu [label="Ion-Mihai Tetcu\nitetcu@FreeBSD.org\n2006/06/07"]
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jacula [label="Giuseppe Pilichi\njacula@FreeBSD.org\n2010/04/05"]
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jadawin [label="Philippe Audeoud\njadawin@FreeBSD.org\n2008/03/02"]
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jkim [label="Jung-uk Kim\njkim@FreeBSD.org\n2007/09/12"]
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jlaffaye [label="Julien Laffaye\njlaffaye@FreeBSD.org\n2011/06/06"]
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jmelo [label="Jean Milanez Melo\njmelo@FreeBSD.org\n2006/03/31"]
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joerg [label="Joerg Wunsch\njoerg@FreeBSD.org\n1994/08/22"]
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johans [label="Johan Selst\njohans@FreeBSD.org\n2006/04/01"]
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|
@ -6,7 +6,7 @@ MK_SSP= no
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LIB= ia64
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INTERNALLIB=
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SRCS= autoload.c bootinfo.c copy.c devicename.c exec.c
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SRCS= autoload.c bootinfo.c copy.c devicename.c exec.c icache.c
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CFLAGS+= -I${.CURDIR}/../../efi/include
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CFLAGS+= -I${.CURDIR}/../../efi/include/${MACHINE_CPUARCH}
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|
@ -258,6 +258,8 @@ ia64_loadseg(Elf_Ehdr *eh, Elf_Phdr *ph, uint64_t delta)
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if (ph->p_flags & PF_X) {
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ia64_text_start = ph->p_vaddr + delta;
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ia64_text_size = ph->p_memsz;
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ia64_sync_icache(ia64_text_start, ia64_text_size);
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} else {
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ia64_data_start = ph->p_vaddr + delta;
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ia64_data_size = ph->p_memsz;
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|
51
sys/boot/ia64/common/icache.c
Normal file
51
sys/boot/ia64/common/icache.c
Normal file
@ -0,0 +1,51 @@
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/*-
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* Copyright (c) 2011 Marcel Moolenaar
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
|
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <stand.h>
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#include <machine/ia64_cpu.h>
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#include "libia64.h"
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void
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ia64_sync_icache(vm_offset_t va, size_t sz)
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{
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uintptr_t pa;
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size_t cnt, max;
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while (sz > 0) {
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max = sz;
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pa = (uintptr_t)ia64_va2pa(va, &max);
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for (cnt = 0; cnt < max; cnt += 32)
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ia64_fc_i(pa + cnt);
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ia64_sync_i();
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va += max;
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sz -= max;
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}
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ia64_srlz_i();
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}
|
@ -64,6 +64,7 @@ void ia64_loadseg(void *, void *, uint64_t);
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ssize_t ia64_copyin(const void *, vm_offset_t, size_t);
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ssize_t ia64_copyout(vm_offset_t, void *, size_t);
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void ia64_sync_icache(vm_offset_t, size_t);
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ssize_t ia64_readin(int, vm_offset_t, size_t);
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void *ia64_va2pa(vm_offset_t, size_t *);
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|
@ -230,3 +230,35 @@ ia64_platform_enter(const char *kernel)
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return (0);
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}
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COMMAND_SET(pbvm, "pbvm", "show PBVM details", command_pbvm);
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static int
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command_pbvm(int argc, char *argv[])
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{
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uint64_t limit, pg, start;
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u_int idx;
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printf("Page table @ %p, size %x\n", ia64_pgtbl, ia64_pgtblsz);
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if (ia64_pgtbl == NULL)
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return (0);
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limit = ~0;
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start = ~0;
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idx = 0;
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while (ia64_pgtbl[idx] != 0) {
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pg = ia64_pgtbl[idx];
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if (pg != limit) {
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if (start != ~0)
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printf("%#lx-%#lx\n", start, limit);
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start = pg;
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}
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limit = pg + IA64_PBVM_PAGE_SIZE;
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idx++;
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}
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if (start != ~0)
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printf("%#lx-%#lx\n", start, limit);
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return (0);
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}
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|
@ -153,9 +153,7 @@ main(int argc, CHAR16 *argv[])
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*/
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cons_probe();
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printf("\n");
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printf("%s, Revision %s\n", bootprog_name, bootprog_rev);
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printf("(%s, %s)\n", bootprog_maker, bootprog_date);
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printf("\n%s, Revision %s\n", bootprog_name, bootprog_rev);
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find_pal_proc();
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@ -214,6 +212,18 @@ static int
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command_quit(int argc, char *argv[])
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{
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exit(0);
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/* NOTREACHED */
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return (CMD_OK);
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}
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COMMAND_SET(reboot, "reboot", "reboot the system", command_reboot);
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static int
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command_reboot(int argc, char *argv[])
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{
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RS->ResetSystem(EfiResetWarm, EFI_SUCCESS, 0, NULL);
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/* NOTREACHED */
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return (CMD_OK);
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}
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@ -585,3 +595,24 @@ command_hcdp(int argc, char *argv[])
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printf("<EOT>\n");
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return (CMD_OK);
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}
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COMMAND_SET(about, "about", "about the loader", command_about);
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extern uint64_t _start_plabel[];
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static int
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command_about(int argc, char *argv[])
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{
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EFI_LOADED_IMAGE *img;
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printf("%s\n", bootprog_name);
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printf("revision %s\n", bootprog_rev);
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printf("built by %s\n", bootprog_maker);
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printf("built on %s\n", bootprog_date);
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printf("\n");
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BS->HandleProtocol(IH, &imgid, (VOID**)&img);
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printf("image loaded at %p\n", img->ImageBase);
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printf("entry at %#lx (%#lx)\n", _start_plabel[0], _start_plabel[1]);
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}
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|
@ -3,6 +3,8 @@ $FreeBSD$
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NOTE ANY CHANGES YOU MAKE TO THE BOOTBLOCKS HERE. The format of this
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file is important. Make sure the current version number is on line 6.
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3.1: Add the about, reboot and pbvm commands.
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I-cache coherency is maintained.
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3.0: Add support for PBVM.
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2.2: Create direct mapping based on start address instead of mapping
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first 256M.
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|
@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/signalvar.h>
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#include <sys/systm.h>
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#include <sys/cons.h>
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#include <sys/conf.h>
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#include <sys/watchdog.h>
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#include <sys/kernel.h>
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@ -64,6 +65,7 @@ db_addr_t db_last_addr;
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db_addr_t db_prev;
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db_addr_t db_next;
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static db_cmdfcn_t db_dump;
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static db_cmdfcn_t db_fncall;
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static db_cmdfcn_t db_gdb;
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static db_cmdfcn_t db_halt;
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@ -102,6 +104,7 @@ static struct command db_cmds[] = {
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{ "w", db_write_cmd, CS_MORE|CS_SET_DOT, 0 },
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{ "delete", db_delete_cmd, 0, 0 },
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{ "d", db_delete_cmd, 0, 0 },
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{ "dump", db_dump, 0, 0 },
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{ "break", db_breakpoint_cmd, 0, 0 },
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{ "b", db_breakpoint_cmd, 0, 0 },
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{ "dwatch", db_deletewatch_cmd, 0, 0 },
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@ -526,6 +529,27 @@ db_error(s)
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kdb_reenter();
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}
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static void
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db_dump(db_expr_t dummy, boolean_t dummy2, db_expr_t dummy3, char *dummy4)
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{
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int error;
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error = doadump(FALSE);
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if (error) {
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db_printf("Cannot dump: ");
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switch (error) {
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case EBUSY:
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db_printf("debugger got invoked while dumping.\n");
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break;
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case ENXIO:
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db_printf("no dump device specified.\n");
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break;
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default:
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db_printf("unknown error (error=%d).\n", error);
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break;
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}
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}
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}
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/*
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* Call random function:
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|
@ -25,8 +25,8 @@
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*/
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/*
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* This is a driver for watchdog timer present in AMD SB600/SB7xx
|
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* south bridges and other watchdog timers advertised via WDRT ACPI table.
|
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* This is a driver for watchdog timer present in AMD SB600/SB7xx/SB8xx
|
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* southbridges.
|
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* Please see the following specifications for the descriptions of the
|
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* registers and flags:
|
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* - AMD SB600 Register Reference Guide, Public Version, Rev. 3.03 (SB600 RRG)
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@ -35,11 +35,13 @@
|
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* http://developer.amd.com/assets/43009_sb7xx_rrg_pub_1.00.pdf
|
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* - AMD SB700/710/750 Register Programming Requirements (RPR)
|
||||
* http://developer.amd.com/assets/42413_sb7xx_rpr_pub_1.00.pdf
|
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* - AMD SB800-Series Southbridges Register Reference Guide (RRG)
|
||||
* http://support.amd.com/us/Embedded_TechDocs/45482.pdf
|
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* Please see the following for Watchdog Resource Table specification:
|
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* - Watchdog Timer Hardware Requirements for Windows Server 2003 (WDRT)
|
||||
* http://www.microsoft.com/whdc/system/sysinternals/watchdog.mspx
|
||||
* AMD SB600/SB7xx watchdog hardware seems to conform to the above,
|
||||
* but my system doesn't provide the table.
|
||||
* AMD SB600/SB7xx/SB8xx watchdog hardware seems to conform to the above
|
||||
* specifications, but the table hasn't been spotted in the wild yet.
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
@ -59,15 +61,15 @@ __FBSDID("$FreeBSD$");
|
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#include <dev/pci/pcivar.h>
|
||||
#include <isa/isavar.h>
|
||||
|
||||
/* RRG 2.3.3.1.1, page 161. */
|
||||
/* SB7xx RRG 2.3.3.1.1. */
|
||||
#define AMDSB_PMIO_INDEX 0xcd6
|
||||
#define AMDSB_PMIO_DATA (PMIO_INDEX + 1)
|
||||
#define AMDSB_PMIO_WIDTH 2
|
||||
/* RRG 2.3.3.2, page 181. */
|
||||
/* SB7xx RRG 2.3.3.2. */
|
||||
#define AMDSB_PM_RESET_STATUS0 0x44
|
||||
#define AMDSB_PM_RESET_STATUS1 0x45
|
||||
#define AMDSB_WD_RST_STS 0x02
|
||||
/* RRG 2.3.3.2, page 188; RPR 2.36, page 30. */
|
||||
/* SB7xx RRG 2.3.3.2, RPR 2.36. */
|
||||
#define AMDSB_PM_WDT_CTRL 0x69
|
||||
#define AMDSB_WDT_DISABLE 0x01
|
||||
#define AMDSB_WDT_RES_MASK (0x02 | 0x04)
|
||||
@ -77,7 +79,18 @@ __FBSDID("$FreeBSD$");
|
||||
#define AMDSB_WDT_RES_1S 0x06
|
||||
#define AMDSB_PM_WDT_BASE_LSB 0x6c
|
||||
#define AMDSB_PM_WDT_BASE_MSB 0x6f
|
||||
/* RRG 2.3.4, page 223, WDRT. */
|
||||
/* SB8xx RRG 2.3.3. */
|
||||
#define AMDSB8_PM_WDT_EN 0x48
|
||||
#define AMDSB8_WDT_DEC_EN 0x01
|
||||
#define AMDSB8_WDT_DISABLE 0x02
|
||||
#define AMDSB8_PM_WDT_CTRL 0x4c
|
||||
#define AMDSB8_WDT_32KHZ 0x00
|
||||
#define AMDSB8_WDT_1HZ 0x03
|
||||
#define AMDSB8_WDT_RES_MASK 0x03
|
||||
#define AMDSB8_PM_RESET_STATUS0 0xC0
|
||||
#define AMDSB8_PM_RESET_STATUS1 0xC1
|
||||
#define AMDSB8_WD_RST_STS 0x20
|
||||
/* SB7xx RRG 2.3.4, WDRT. */
|
||||
#define AMDSB_WD_CTRL 0x00
|
||||
#define AMDSB_WD_RUN 0x01
|
||||
#define AMDSB_WD_FIRED 0x02
|
||||
@ -90,8 +103,9 @@ __FBSDID("$FreeBSD$");
|
||||
#define AMDSB_WDIO_REG_WIDTH 4
|
||||
/* WDRT */
|
||||
#define MAXCOUNT_MIN_VALUE 511
|
||||
/* RRG 2.3.1.1, page 122; SB600 RRG 2.3.1.1, page 97. */
|
||||
#define AMDSB7xx_SMBUS_DEVID 0x43851002
|
||||
/* SB7xx RRG 2.3.1.1, SB600 RRG 2.3.1.1, SB8xx RRG 2.3.1. */
|
||||
#define AMDSB_SMBUS_DEVID 0x43851002
|
||||
#define AMDSB8_SMBUS_REVID 0x40
|
||||
|
||||
#define amdsbwd_verbose_printf(dev, ...) \
|
||||
do { \
|
||||
@ -265,7 +279,7 @@ amdsbwd_identify(driver_t *driver, device_t parent)
|
||||
smb_dev = pci_find_bsf(0, 20, 0);
|
||||
if (smb_dev == NULL)
|
||||
return;
|
||||
if (pci_get_devid(smb_dev) != AMDSB7xx_SMBUS_DEVID)
|
||||
if (pci_get_devid(smb_dev) != AMDSB_SMBUS_DEVID)
|
||||
return;
|
||||
|
||||
child = BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE, "amdsbwd", -1);
|
||||
@ -273,15 +287,102 @@ amdsbwd_identify(driver_t *driver, device_t parent)
|
||||
device_printf(parent, "add amdsbwd child failed\n");
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
amdsbwd_probe_sb7xx(device_t dev, struct resource *pmres, uint32_t *addr)
|
||||
{
|
||||
uint32_t val;
|
||||
int i;
|
||||
|
||||
/* Report cause of previous reset for user's convenience. */
|
||||
val = pmio_read(pmres, AMDSB_PM_RESET_STATUS0);
|
||||
if (val != 0)
|
||||
amdsbwd_verbose_printf(dev, "ResetStatus0 = %#04x\n", val);
|
||||
val = pmio_read(pmres, AMDSB_PM_RESET_STATUS1);
|
||||
if (val != 0)
|
||||
amdsbwd_verbose_printf(dev, "ResetStatus1 = %#04x\n", val);
|
||||
if ((val & AMDSB_WD_RST_STS) != 0)
|
||||
device_printf(dev, "Previous Reset was caused by Watchdog\n");
|
||||
|
||||
/* Find base address of memory mapped WDT registers. */
|
||||
for (*addr = 0, i = 0; i < 4; i++) {
|
||||
*addr <<= 8;
|
||||
*addr |= pmio_read(pmres, AMDSB_PM_WDT_BASE_MSB - i);
|
||||
}
|
||||
/* Set watchdog timer tick to 1s. */
|
||||
val = pmio_read(pmres, AMDSB_PM_WDT_CTRL);
|
||||
val &= ~AMDSB_WDT_RES_MASK;
|
||||
val |= AMDSB_WDT_RES_10MS;
|
||||
pmio_write(pmres, AMDSB_PM_WDT_CTRL, val);
|
||||
|
||||
/* Enable watchdog device (in stopped state). */
|
||||
val = pmio_read(pmres, AMDSB_PM_WDT_CTRL);
|
||||
val &= ~AMDSB_WDT_DISABLE;
|
||||
pmio_write(pmres, AMDSB_PM_WDT_CTRL, val);
|
||||
|
||||
/*
|
||||
* XXX TODO: Ensure that watchdog decode is enabled
|
||||
* (register 0x41, bit 3).
|
||||
*/
|
||||
device_set_desc(dev, "AMD SB600/SB7xx Watchdog Timer");
|
||||
}
|
||||
|
||||
static void
|
||||
amdsbwd_probe_sb8xx(device_t dev, struct resource *pmres, uint32_t *addr)
|
||||
{
|
||||
uint32_t val;
|
||||
int i;
|
||||
|
||||
/* Report cause of previous reset for user's convenience. */
|
||||
val = pmio_read(pmres, AMDSB8_PM_RESET_STATUS0);
|
||||
if (val != 0)
|
||||
amdsbwd_verbose_printf(dev, "ResetStatus0 = %#04x\n", val);
|
||||
val = pmio_read(pmres, AMDSB8_PM_RESET_STATUS1);
|
||||
if (val != 0)
|
||||
amdsbwd_verbose_printf(dev, "ResetStatus1 = %#04x\n", val);
|
||||
if ((val & AMDSB8_WD_RST_STS) != 0)
|
||||
device_printf(dev, "Previous Reset was caused by Watchdog\n");
|
||||
|
||||
/* Find base address of memory mapped WDT registers. */
|
||||
for (*addr = 0, i = 0; i < 4; i++) {
|
||||
*addr <<= 8;
|
||||
*addr |= pmio_read(pmres, AMDSB8_PM_WDT_EN + 3 - i);
|
||||
}
|
||||
*addr &= ~0x07u;
|
||||
|
||||
/* Set watchdog timer tick to 1s. */
|
||||
val = pmio_read(pmres, AMDSB8_PM_WDT_CTRL);
|
||||
val &= ~AMDSB8_WDT_RES_MASK;
|
||||
val |= AMDSB8_WDT_1HZ;
|
||||
pmio_write(pmres, AMDSB8_PM_WDT_CTRL, val);
|
||||
#ifdef AMDSBWD_DEBUG
|
||||
val = pmio_read(pmres, AMDSB8_PM_WDT_CTRL);
|
||||
amdsbwd_verbose_printf(dev, "AMDSB8_PM_WDT_CTRL value = %#02x\n", val);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Enable watchdog device (in stopped state)
|
||||
* and decoding of its address.
|
||||
*/
|
||||
val = pmio_read(pmres, AMDSB8_PM_WDT_EN);
|
||||
val &= ~AMDSB8_WDT_DISABLE;
|
||||
val |= AMDSB8_WDT_DEC_EN;
|
||||
pmio_write(pmres, AMDSB8_PM_WDT_EN, val);
|
||||
#ifdef AMDSBWD_DEBUG
|
||||
val = pmio_read(pmres, AMDSB8_PM_WDT_EN);
|
||||
device_printf(dev, "AMDSB8_PM_WDT_EN value = %#02x\n", val);
|
||||
#endif
|
||||
device_set_desc(dev, "AMD SB8xx Watchdog Timer");
|
||||
}
|
||||
|
||||
static int
|
||||
amdsbwd_probe(device_t dev)
|
||||
{
|
||||
struct resource *res;
|
||||
device_t smb_dev;
|
||||
uint32_t addr;
|
||||
uint32_t val;
|
||||
int rid;
|
||||
int rc;
|
||||
int i;
|
||||
|
||||
/* Do not claim some ISA PnP device by accident. */
|
||||
if (isa_get_logicalid(dev) != 0)
|
||||
@ -301,21 +402,16 @@ amdsbwd_probe(device_t dev)
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
/* Report cause of previous reset for user's convenience. */
|
||||
val = pmio_read(res, AMDSB_PM_RESET_STATUS0);
|
||||
if (val != 0)
|
||||
amdsbwd_verbose_printf(dev, "ResetStatus0 = %#04x\n", val);
|
||||
val = pmio_read(res, AMDSB_PM_RESET_STATUS1);
|
||||
if (val != 0)
|
||||
amdsbwd_verbose_printf(dev, "ResetStatus1 = %#04x\n", val);
|
||||
if ((val & AMDSB_WD_RST_STS) != 0)
|
||||
device_printf(dev, "Previous Reset was caused by Watchdog\n");
|
||||
smb_dev = pci_find_bsf(0, 20, 0);
|
||||
KASSERT(smb_dev != NULL, ("can't find SMBus PCI device\n"));
|
||||
if (pci_get_revid(smb_dev) < AMDSB8_SMBUS_REVID)
|
||||
amdsbwd_probe_sb7xx(dev, res, &addr);
|
||||
else
|
||||
amdsbwd_probe_sb8xx(dev, res, &addr);
|
||||
|
||||
bus_release_resource(dev, SYS_RES_IOPORT, rid, res);
|
||||
bus_delete_resource(dev, SYS_RES_IOPORT, rid);
|
||||
|
||||
/* Find base address of memory mapped WDT registers. */
|
||||
for (addr = 0, i = 0; i < 4; i++) {
|
||||
addr <<= 8;
|
||||
addr |= pmio_read(res, AMDSB_PM_WDT_BASE_MSB - i);
|
||||
}
|
||||
amdsbwd_verbose_printf(dev, "memory base address = %#010x\n", addr);
|
||||
rc = bus_set_resource(dev, SYS_RES_MEMORY, 0, addr + AMDSB_WD_CTRL,
|
||||
AMDSB_WDIO_REG_WIDTH);
|
||||
@ -330,36 +426,25 @@ amdsbwd_probe(device_t dev)
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
/* Set watchdog timer tick to 10ms. */
|
||||
val = pmio_read(res, AMDSB_PM_WDT_CTRL);
|
||||
val &= ~AMDSB_WDT_RES_MASK;
|
||||
val |= AMDSB_WDT_RES_10MS;
|
||||
pmio_write(res, AMDSB_PM_WDT_CTRL, val);
|
||||
|
||||
/* Enable watchdog device (in stopped state). */
|
||||
val = pmio_read(res, AMDSB_PM_WDT_CTRL);
|
||||
val &= ~AMDSB_WDT_DISABLE;
|
||||
pmio_write(res, AMDSB_PM_WDT_CTRL, val);
|
||||
|
||||
/*
|
||||
* XXX TODO: Ensure that watchdog decode is enabled
|
||||
* (register 0x41, bit 3).
|
||||
*/
|
||||
bus_release_resource(dev, SYS_RES_IOPORT, rid, res);
|
||||
bus_delete_resource(dev, SYS_RES_IOPORT, rid);
|
||||
|
||||
device_set_desc(dev, "AMD SB600/SB7xx Watchdog Timer");
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
amdsbwd_attach_sb(device_t dev, struct amdsbwd_softc *sc)
|
||||
{
|
||||
device_t smb_dev;
|
||||
|
||||
sc->max_ticks = UINT16_MAX;
|
||||
sc->ms_per_tick = 10;
|
||||
sc->rid_ctrl = 0;
|
||||
sc->rid_count = 1;
|
||||
|
||||
smb_dev = pci_find_bsf(0, 20, 0);
|
||||
KASSERT(smb_dev != NULL, ("can't find SMBus PCI device\n"));
|
||||
if (pci_get_revid(smb_dev) < AMDSB8_SMBUS_REVID)
|
||||
sc->ms_per_tick = 10;
|
||||
else
|
||||
sc->ms_per_tick = 1000;
|
||||
|
||||
sc->res_ctrl = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
|
||||
&sc->rid_ctrl, RF_ACTIVE);
|
||||
if (sc->res_ctrl == NULL) {
|
||||
@ -388,6 +473,11 @@ amdsbwd_attach(device_t dev)
|
||||
if (rc != 0)
|
||||
goto fail;
|
||||
|
||||
#ifdef AMDSBWD_DEBUG
|
||||
device_printf(dev, "wd ctrl = %#04x\n", wdctrl_read(sc));
|
||||
device_printf(dev, "wd count = %#04x\n", wdcount_read(sc));
|
||||
#endif
|
||||
|
||||
/* Setup initial state of Watchdog Control. */
|
||||
wdctrl_write(sc, AMDSB_WD_FIRED);
|
||||
|
||||
|
@ -1097,10 +1097,8 @@ get_typematic(keyboard_t *kbd)
|
||||
x86regs_t regs;
|
||||
uint8_t *p;
|
||||
|
||||
if (!(kbd->kb_config & KB_CONF_PROBE_TYPEMATIC))
|
||||
return (ENODEV);
|
||||
|
||||
if (x86bios_get_intr(0x15) == 0 || x86bios_get_intr(0x16) == 0)
|
||||
if (x86bios_get_intr(0x15) != 0xf000f859 ||
|
||||
x86bios_get_intr(0x16) != 0xf000e82e)
|
||||
return (ENODEV);
|
||||
|
||||
/* Is BIOS system configuration table supported? */
|
||||
|
@ -36,7 +36,6 @@
|
||||
#define KB_CONF_NO_RESET (1 << 1) /* don't reset the keyboard */
|
||||
#define KB_CONF_ALT_SCANCODESET (1 << 2) /* assume the XT type keyboard */
|
||||
#define KB_CONF_NO_PROBE_TEST (1 << 3) /* don't test keyboard during probe */
|
||||
#define KB_CONF_PROBE_TYPEMATIC (1 << 4) /* probe keyboard typematic */
|
||||
|
||||
#ifdef _KERNEL
|
||||
|
||||
|
@ -786,6 +786,8 @@ ia64_init(void)
|
||||
ia64_sal_init();
|
||||
calculate_frequencies();
|
||||
|
||||
set_cputicker(ia64_get_itc, (u_long)itc_freq * 1000000, 0);
|
||||
|
||||
/*
|
||||
* Setup the PCPU data for the bootstrap processor. It is needed
|
||||
* by printf(). Also, since printf() has critical sections, we
|
||||
|
@ -233,30 +233,32 @@ print_uptime(void)
|
||||
printf("%lds\n", (long)ts.tv_sec);
|
||||
}
|
||||
|
||||
static void
|
||||
doadump(void)
|
||||
int
|
||||
doadump(boolean_t textdump)
|
||||
{
|
||||
boolean_t coredump;
|
||||
|
||||
/*
|
||||
* Sometimes people have to call this from the kernel debugger.
|
||||
* (if 'panic' can not dump)
|
||||
* Give them a clue as to why they can't dump.
|
||||
*/
|
||||
if (dumper.dumper == NULL) {
|
||||
printf("Cannot dump. Device not defined or unavailable.\n");
|
||||
return;
|
||||
}
|
||||
if (dumping)
|
||||
return (EBUSY);
|
||||
if (dumper.dumper == NULL)
|
||||
return (ENXIO);
|
||||
|
||||
savectx(&dumppcb);
|
||||
dumptid = curthread->td_tid;
|
||||
dumping++;
|
||||
|
||||
coredump = TRUE;
|
||||
#ifdef DDB
|
||||
if (textdump_pending)
|
||||
if (textdump && textdump_pending) {
|
||||
coredump = FALSE;
|
||||
textdump_dumpsys(&dumper);
|
||||
else
|
||||
}
|
||||
#endif
|
||||
if (coredump)
|
||||
dumpsys(&dumper);
|
||||
|
||||
dumping--;
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -425,7 +427,7 @@ kern_reboot(int howto)
|
||||
EVENTHANDLER_INVOKE(shutdown_post_sync, howto);
|
||||
|
||||
if ((howto & (RB_HALT|RB_DUMP)) == RB_DUMP && !cold && !dumping)
|
||||
doadump();
|
||||
doadump(TRUE);
|
||||
|
||||
/* Now that we're going to really halt the system... */
|
||||
EVENTHANDLER_INVOKE(shutdown_final, howto);
|
||||
|
@ -206,7 +206,7 @@ ksched_setscheduler(struct ksched *ksched,
|
||||
if (param->sched_priority >= 0 &&
|
||||
param->sched_priority <= (PRI_MAX_TIMESHARE - PRI_MIN_TIMESHARE)) {
|
||||
rtp.type = RTP_PRIO_NORMAL;
|
||||
rtp.prio = p4prio_to_rtpprio(param->sched_priority);
|
||||
rtp.prio = p4prio_to_tsprio(param->sched_priority);
|
||||
rtp_to_pri(&rtp, td);
|
||||
} else
|
||||
e = EINVAL;
|
||||
|
@ -163,6 +163,7 @@ uprintf(const char *fmt, ...)
|
||||
goto out;
|
||||
}
|
||||
pca.flags = TOTTY;
|
||||
pca.p_bufr = NULL;
|
||||
va_start(ap, fmt);
|
||||
tty_lock(pca.tty);
|
||||
retval = kvprintf(fmt, putchar, &pca, 10, ap);
|
||||
@ -206,6 +207,7 @@ tprintf(struct proc *p, int pri, const char *fmt, ...)
|
||||
pca.pri = pri;
|
||||
pca.tty = tp;
|
||||
pca.flags = flags;
|
||||
pca.p_bufr = NULL;
|
||||
va_start(ap, fmt);
|
||||
if (pca.tty != NULL)
|
||||
tty_lock(pca.tty);
|
||||
@ -234,6 +236,7 @@ ttyprintf(struct tty *tp, const char *fmt, ...)
|
||||
va_start(ap, fmt);
|
||||
pca.tty = tp;
|
||||
pca.flags = TOTTY;
|
||||
pca.p_bufr = NULL;
|
||||
retval = kvprintf(fmt, putchar, &pca, 10, ap);
|
||||
va_end(ap);
|
||||
return (retval);
|
||||
|
@ -43,6 +43,7 @@
|
||||
#include <machine/in_cksum.h>
|
||||
|
||||
#include <netinet/libalias/alias.h>
|
||||
#include <netinet/libalias/alias_local.h>
|
||||
|
||||
#include <netgraph/ng_message.h>
|
||||
#include <netgraph/ng_parse.h>
|
||||
@ -696,22 +697,35 @@ ng_nat_rcvdata(hook_p hook, item_p item )
|
||||
KASSERT(m->m_pkthdr.len == ntohs(ip->ip_len),
|
||||
("ng_nat: ip_len != m_pkthdr.len"));
|
||||
|
||||
/*
|
||||
* We drop packet when:
|
||||
* 1. libalias returns PKT_ALIAS_ERROR;
|
||||
* 2. For incoming packets:
|
||||
* a) for unresolved fragments;
|
||||
* b) libalias returns PKT_ALIAS_IGNORED and
|
||||
* PKT_ALIAS_DENY_INCOMING flag is set.
|
||||
*/
|
||||
if (hook == priv->in) {
|
||||
rval = LibAliasIn(priv->lib, c, m->m_len + M_TRAILINGSPACE(m));
|
||||
if (rval != PKT_ALIAS_OK &&
|
||||
rval != PKT_ALIAS_FOUND_HEADER_FRAGMENT) {
|
||||
if (rval == PKT_ALIAS_ERROR ||
|
||||
rval == PKT_ALIAS_UNRESOLVED_FRAGMENT ||
|
||||
(rval == PKT_ALIAS_IGNORED &&
|
||||
(priv->lib->packetAliasMode &
|
||||
PKT_ALIAS_DENY_INCOMING) != 0)) {
|
||||
NG_FREE_ITEM(item);
|
||||
return (EINVAL);
|
||||
}
|
||||
} else if (hook == priv->out) {
|
||||
rval = LibAliasOut(priv->lib, c, m->m_len + M_TRAILINGSPACE(m));
|
||||
if (rval != PKT_ALIAS_OK) {
|
||||
if (rval == PKT_ALIAS_ERROR) {
|
||||
NG_FREE_ITEM(item);
|
||||
return (EINVAL);
|
||||
}
|
||||
} else
|
||||
panic("ng_nat: unknown hook!\n");
|
||||
|
||||
if (rval == PKT_ALIAS_RESPOND)
|
||||
m->m_flags |= M_SKIP_FIREWALL;
|
||||
m->m_pkthdr.len = m->m_len = ntohs(ip->ip_len);
|
||||
|
||||
if ((ip->ip_off & htons(IP_OFFMASK)) == 0 &&
|
||||
|
@ -262,17 +262,27 @@ ipfw_nat(struct ip_fw_args *args, struct cfg_nat *t, struct mbuf *m)
|
||||
else
|
||||
retval = LibAliasOut(t->lib, c,
|
||||
mcl->m_len + M_TRAILINGSPACE(mcl));
|
||||
if (retval == PKT_ALIAS_RESPOND) {
|
||||
m->m_flags |= M_SKIP_FIREWALL;
|
||||
retval = PKT_ALIAS_OK;
|
||||
}
|
||||
if (retval != PKT_ALIAS_OK &&
|
||||
retval != PKT_ALIAS_FOUND_HEADER_FRAGMENT) {
|
||||
|
||||
/*
|
||||
* We drop packet when:
|
||||
* 1. libalias returns PKT_ALIAS_ERROR;
|
||||
* 2. For incoming packets:
|
||||
* a) for unresolved fragments;
|
||||
* b) libalias returns PKT_ALIAS_IGNORED and
|
||||
* PKT_ALIAS_DENY_INCOMING flag is set.
|
||||
*/
|
||||
if (retval == PKT_ALIAS_ERROR ||
|
||||
(args->oif == NULL && (retval == PKT_ALIAS_UNRESOLVED_FRAGMENT ||
|
||||
(retval == PKT_ALIAS_IGNORED &&
|
||||
(t->lib->packetAliasMode & PKT_ALIAS_DENY_INCOMING) != 0)))) {
|
||||
/* XXX - should i add some logging? */
|
||||
m_free(mcl);
|
||||
args->m = NULL;
|
||||
return (IP_FW_DENY);
|
||||
}
|
||||
|
||||
if (retval == PKT_ALIAS_RESPOND)
|
||||
m->m_flags |= M_SKIP_FIREWALL;
|
||||
mcl->m_pkthdr.len = mcl->m_len = ntohs(ip->ip_len);
|
||||
|
||||
/*
|
||||
|
@ -135,13 +135,13 @@ struct sctp_nat_assoc {
|
||||
struct in_addr a_addr; /**< alias ip address */
|
||||
int state; /**< current state of NAT association */
|
||||
int TableRegister; /**< stores which look up tables association is registered in */
|
||||
int exp; /**< timer expiration in seconds from uptime */
|
||||
int exp; /**< timer expiration in seconds from uptime */
|
||||
int exp_loc; /**< current location in timer_Q */
|
||||
int num_Gaddr; /**< number of global IP addresses in the list */
|
||||
LIST_HEAD(sctpGlobalAddresshead,sctp_GlobalAddress) Gaddr; /**< List of global addresses */
|
||||
LIST_ENTRY (sctp_nat_assoc) list_L; /**< Linked list of pointers for Local table*/
|
||||
LIST_ENTRY (sctp_nat_assoc) list_G; /**< Linked list of pointers for Global table */
|
||||
LIST_ENTRY (sctp_nat_assoc) timer_Q; /**< Linked list of pointers for timer Q */
|
||||
LIST_ENTRY (sctp_nat_assoc) list_L; /**< Linked list of pointers for Local table*/
|
||||
LIST_ENTRY (sctp_nat_assoc) list_G; /**< Linked list of pointers for Global table */
|
||||
LIST_ENTRY (sctp_nat_assoc) timer_Q; /**< Linked list of pointers for timer Q */
|
||||
//Using libalias locking
|
||||
};
|
||||
|
||||
|
@ -332,6 +332,7 @@ struct dumperinfo {
|
||||
int set_dumper(struct dumperinfo *);
|
||||
int dump_write(struct dumperinfo *, void *, vm_offset_t, off_t, size_t);
|
||||
void dumpsys(struct dumperinfo *);
|
||||
int doadump(boolean_t);
|
||||
extern int dumping; /* system is dumping */
|
||||
|
||||
#endif /* _KERNEL */
|
||||
|
@ -19,6 +19,7 @@ MAN= rtsold.8
|
||||
MLINKS= rtsold.8 rtsol.8
|
||||
SRCS= rtsold.c rtsol.c if.c probe.c dump.c rtsock.c
|
||||
|
||||
WARNS?= 3
|
||||
CFLAGS+= -DHAVE_ARC4RANDOM -DHAVE_POLL_H
|
||||
DPADD= ${LIBKVM}
|
||||
LDADD= -lkvm
|
||||
|
Loading…
Reference in New Issue
Block a user