From 5ef87bf8b687575bee010967e23cd2c552b43ad9 Mon Sep 17 00:00:00 2001 From: Navdeep Parhar Date: Wed, 26 May 2021 19:18:42 -0700 Subject: [PATCH] cxgbe(4): Fix an incorrect assert. CTRL and OFLD tx queues do not have automatic tx credit flush enabled so it is okay for the cidx not to be the same as the pidx when the queue is destroyed. Reported by: Jithesh Arakkan @ Chelsio MFC after: 1 week Sponsored by: Chelsio Communications --- sys/dev/cxgbe/t4_sge.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/sys/dev/cxgbe/t4_sge.c b/sys/dev/cxgbe/t4_sge.c index 0b429c602a91..5091c8f992bd 100644 --- a/sys/dev/cxgbe/t4_sge.c +++ b/sys/dev/cxgbe/t4_sge.c @@ -4346,7 +4346,8 @@ static void free_eq(struct adapter *sc, struct sge_eq *eq) { MPASS(eq->flags & EQ_SW_ALLOCATED); - MPASS(eq->pidx == eq->cidx); + if (eq->type == EQ_ETH) + MPASS(eq->pidx == eq->cidx); free_ring(sc, eq->desc_tag, eq->desc_map, eq->ba, eq->desc); mtx_destroy(&eq->eq_lock); @@ -4499,6 +4500,8 @@ free_wrq(struct adapter *sc, struct sge_wrq *wrq) { free_eq(sc, &wrq->eq); MPASS(wrq->nwr_pending == 0); + MPASS(TAILQ_EMPTY(&wrq->incomplete_wrs)); + MPASS(STAILQ_EMPTY(&wrq->wr_list)); bzero(wrq, sizeof(*wrq)); }