Initialize various DDP parameters in the main cxgbe(4) driver:
- Setup multiple DDP page sizes. When the driver attempts DDP it will try to combine physically contiguous pages into regions of these sizes. - Set the indicate size such that the payload carried in the indicate can be copied in the header mbuf (and the 16K rx buffer can be recycled). - Set DDP threshold to the max payload that the chip will coalesce and deliver to the driver (this is ~16K by default, which is also why the offload rx queue is backed by 16K buffers). If the chip is able to coalesce up to the max it's allowed to, it's a good sign that the peer is transmitting in bulk without any TCP PSH. MFC after: 2 weeks
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@ -135,6 +135,7 @@ enum {
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#else
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FL_BUF_SIZES = 3, /* cluster, jumbo9k, jumbo16k */
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#endif
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OFLD_BUF_SIZE = MJUM16BYTES, /* size of fl buffer for TOE rxq */
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CTRL_EQ_QSIZE = 128,
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@ -143,6 +144,12 @@ enum {
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TX_WR_FLITS = SGE_MAX_WR_LEN / 8
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};
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#ifdef T4_PKT_TIMESTAMP
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#define RX_COPY_THRESHOLD (MINCLSIZE - 8)
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#else
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#define RX_COPY_THRESHOLD MINCLSIZE
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#endif
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enum {
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/* adapter intr_type */
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INTR_INTX = (1 << 0),
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@ -515,12 +515,16 @@ t4_attach(device_t dev)
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goto done; /* error message displayed already */
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if (sc->flags & MASTER_PF) {
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uint16_t indsz = min(RX_COPY_THRESHOLD - 1, M_INDICATESIZE);
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/* final tweaks to some settings */
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t4_load_mtus(sc, sc->params.mtus, sc->params.a_wnd,
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sc->params.b_wnd);
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t4_write_reg(sc, A_ULP_RX_TDDP_PSZ, V_HPZ0(PAGE_SHIFT - 12));
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/* 4K, 16K, 64K, 256K DDP "page sizes" */
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t4_write_reg(sc, A_ULP_RX_TDDP_PSZ, V_HPZ0(0) | V_HPZ1(2) |
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V_HPZ2(4) | V_HPZ3(6));
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t4_set_reg_field(sc, A_ULP_RX_CTL, F_TDDPTAGTCB, F_TDDPTAGTCB);
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t4_set_reg_field(sc, A_TP_PARA_REG3, F_TUNNELCNGDROP0 |
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F_TUNNELCNGDROP1 | F_TUNNELCNGDROP2 | F_TUNNELCNGDROP3,
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F_TUNNELCNGDROP0 | F_TUNNELCNGDROP1 | F_TUNNELCNGDROP2 |
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@ -528,7 +532,7 @@ t4_attach(device_t dev)
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t4_set_reg_field(sc, A_TP_PARA_REG5,
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V_INDICATESIZE(M_INDICATESIZE) |
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F_REARMDDPOFFSET | F_RESETDDPOFFSET,
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V_INDICATESIZE(M_INDICATESIZE) |
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V_INDICATESIZE(indsz) |
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F_REARMDDPOFFSET | F_RESETDDPOFFSET);
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} else {
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/*
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@ -3228,10 +3232,13 @@ t4_sysctls(struct adapter *sc)
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sc->tt.ddp = 0;
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SYSCTL_ADD_INT(ctx, children, OID_AUTO, "ddp", CTLFLAG_RW,
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&sc->tt.ddp, 0, "DDP allowed");
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sc->tt.indsz = M_INDICATESIZE;
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sc->tt.indsz = G_INDICATESIZE(t4_read_reg(sc, A_TP_PARA_REG5));
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SYSCTL_ADD_INT(ctx, children, OID_AUTO, "indsz", CTLFLAG_RW,
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&sc->tt.indsz, 0, "DDP max indicate size allowed");
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sc->tt.ddp_thres = 3*4096;
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sc->tt.ddp_thres =
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G_RXCOALESCESIZE(t4_read_reg(sc, A_TP_PARA_REG2));
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SYSCTL_ADD_INT(ctx, children, OID_AUTO, "ddp_thres", CTLFLAG_RW,
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&sc->tt.ddp_thres, 0, "DDP threshold");
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}
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@ -627,7 +627,7 @@ t4_setup_port_queues(struct port_info *pi)
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snprintf(name, sizeof(name), "%s ofld_rxq%d-fl",
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device_get_nameunit(pi->dev), i);
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init_fl(&ofld_rxq->fl, pi->qsize_rxq / 8, MJUM16BYTES, name);
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init_fl(&ofld_rxq->fl, pi->qsize_rxq / 8, OFLD_BUF_SIZE, name);
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if (sc->flags & INTR_DIRECT ||
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(sc->intr_count > 1 && pi->nofldrxq > pi->nrxq)) {
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@ -1022,13 +1022,6 @@ service_iq(struct sge_iq *iq, int budget)
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return (0);
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}
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#ifdef T4_PKT_TIMESTAMP
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#define RX_COPY_THRESHOLD (MINCLSIZE - 8)
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#else
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#define RX_COPY_THRESHOLD MINCLSIZE
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#endif
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static struct mbuf *
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get_fl_payload(struct adapter *sc, struct sge_fl *fl, uint32_t len_newbuf,
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int *fl_bufs_used)
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