MFC 205851:
Add a handler for the local APIC error interrupt. For now it just prints out the current value of the local APIC error register when the interrupt fires.
This commit is contained in:
John Baldwin
parent
066adacfb1
commit
5f99d9e2ba
@ -104,6 +104,18 @@ IDTVEC(timerint)
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MEXITCOUNT
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jmp doreti
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/*
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* Local APIC error interrupt handler.
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*/
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.text
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SUPERALIGN_TEXT
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IDTVEC(errorint)
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PUSH_FRAME
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FAKE_MCOUNT(TF_RIP(%rsp))
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call lapic_handle_error
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MEXITCOUNT
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jmp doreti
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#ifdef SMP
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/*
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* Global address space TLB shootdown.
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@ -115,14 +115,12 @@ struct lapic {
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int la_ioint_irqs[APIC_NUM_IOINTS + 1];
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} static lapics[MAX_APIC_ID + 1];
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/* XXX: should thermal be an NMI? */
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/* Global defaults for local APIC LVT entries. */
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static struct lvt lvts[LVT_MAX + 1] = {
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{ 1, 1, 1, 1, APIC_LVT_DM_EXTINT, 0 }, /* LINT0: masked ExtINT */
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{ 1, 1, 0, 1, APIC_LVT_DM_NMI, 0 }, /* LINT1: NMI */
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{ 1, 1, 1, 1, APIC_LVT_DM_FIXED, APIC_TIMER_INT }, /* Timer */
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{ 1, 1, 1, 1, APIC_LVT_DM_FIXED, APIC_ERROR_INT }, /* Error */
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{ 1, 1, 0, 1, APIC_LVT_DM_FIXED, APIC_ERROR_INT }, /* Error */
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{ 1, 1, 1, 1, APIC_LVT_DM_NMI, 0 }, /* PMC */
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{ 1, 1, 1, 1, APIC_LVT_DM_FIXED, APIC_THERMAL_INT }, /* Thermal */
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};
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@ -225,7 +223,10 @@ lapic_init(vm_paddr_t addr)
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/* Local APIC timer interrupt. */
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setidt(APIC_TIMER_INT, IDTVEC(timerint), SDT_SYSIGT, SEL_KPL, 0);
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/* XXX: error/thermal interrupts */
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/* Local APIC error interrupt. */
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setidt(APIC_ERROR_INT, IDTVEC(errorint), SDT_SYSIGT, SEL_KPL, 0);
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/* XXX: Thermal interrupt */
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}
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/*
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@ -278,7 +279,7 @@ lapic_dump(const char* str)
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lapic->id, lapic->version, lapic->ldr, lapic->dfr);
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printf(" lint0: 0x%08x lint1: 0x%08x TPR: 0x%08x SVR: 0x%08x\n",
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lapic->lvt_lint0, lapic->lvt_lint1, lapic->tpr, lapic->svr);
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printf(" timer: 0x%08x therm: 0x%08x err: 0x%08x pcm: 0x%08x\n",
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printf(" timer: 0x%08x therm: 0x%08x err: 0x%08x pmc: 0x%08x\n",
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lapic->lvt_timer, lapic->lvt_thermal, lapic->lvt_error,
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lapic->lvt_pcint);
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}
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@ -326,7 +327,11 @@ lapic_setup(int boot)
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lapic_timer_enable_intr();
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}
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/* XXX: Error and thermal LVTs */
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/* Program error LVT and clear any existing errors. */
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lapic->lvt_error = lvt_mode(la, LVT_ERROR, lapic->lvt_error);
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lapic->esr = 0;
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/* XXX: Thermal LVT */
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intr_restore(eflags);
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}
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@ -725,18 +730,6 @@ lapic_eoi(void)
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lapic->eoi = 0;
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}
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/*
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* Read the contents of the error status register. We have to write
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* to the register first before reading from it.
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*/
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u_int
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lapic_error(void)
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{
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lapic->esr = 0;
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return (lapic->esr);
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}
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void
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lapic_handle_intr(int vector, struct trapframe *frame)
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{
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@ -863,6 +856,24 @@ lapic_timer_enable_intr(void)
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lapic->lvt_timer = value;
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}
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void
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lapic_handle_error(void)
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{
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u_int32_t esr;
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/*
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* Read the contents of the error status register. Write to
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* the register first before reading from it to force the APIC
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* to update its value to indicate any errors that have
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* occurred since the previous write to the register.
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*/
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lapic->esr = 0;
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esr = lapic->esr;
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printf("CPU%d: local APIC error 0x%x\n", PCPU_GET(cpuid), esr);
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lapic_eoi();
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}
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u_int
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apic_cpuid(u_int apic_id)
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{
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@ -179,7 +179,8 @@ struct apic_enumerator {
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inthand_t
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IDTVEC(apic_isr1), IDTVEC(apic_isr2), IDTVEC(apic_isr3),
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IDTVEC(apic_isr4), IDTVEC(apic_isr5), IDTVEC(apic_isr6),
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IDTVEC(apic_isr7), IDTVEC(spuriousint), IDTVEC(timerint);
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IDTVEC(apic_isr7), IDTVEC(errorint), IDTVEC(spuriousint),
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IDTVEC(timerint);
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extern vm_paddr_t lapic_paddr;
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extern int apic_cpuids[];
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@ -211,13 +212,13 @@ void lapic_disable_pmc(void);
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void lapic_dump(const char *str);
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int lapic_enable_pmc(void);
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void lapic_eoi(void);
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u_int lapic_error(void);
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int lapic_id(void);
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void lapic_init(vm_paddr_t addr);
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int lapic_intr_pending(u_int vector);
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void lapic_ipi_raw(register_t icrlo, u_int dest);
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void lapic_ipi_vectored(u_int vector, int dest);
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int lapic_ipi_wait(int delay);
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void lapic_handle_error(void);
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void lapic_handle_intr(int vector, struct trapframe *frame);
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void lapic_handle_timer(struct trapframe *frame);
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void lapic_reenable_pmc(void);
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@ -110,6 +110,19 @@ IDTVEC(timerint)
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MEXITCOUNT
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jmp doreti
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/*
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* Local APIC error interrupt handler.
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*/
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.text
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SUPERALIGN_TEXT
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IDTVEC(errorint)
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PUSH_FRAME
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SET_KERNEL_SREGS
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FAKE_MCOUNT(TF_EIP(%esp))
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call lapic_handle_error
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MEXITCOUNT
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jmp doreti
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#ifdef SMP
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/*
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* Global address space TLB shootdown.
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@ -116,14 +116,12 @@ struct lapic {
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int la_ioint_irqs[APIC_NUM_IOINTS + 1];
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} static lapics[MAX_APIC_ID + 1];
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/* XXX: should thermal be an NMI? */
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/* Global defaults for local APIC LVT entries. */
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static struct lvt lvts[LVT_MAX + 1] = {
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{ 1, 1, 1, 1, APIC_LVT_DM_EXTINT, 0 }, /* LINT0: masked ExtINT */
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{ 1, 1, 0, 1, APIC_LVT_DM_NMI, 0 }, /* LINT1: NMI */
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{ 1, 1, 1, 1, APIC_LVT_DM_FIXED, APIC_TIMER_INT }, /* Timer */
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{ 1, 1, 1, 1, APIC_LVT_DM_FIXED, APIC_ERROR_INT }, /* Error */
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{ 1, 1, 0, 1, APIC_LVT_DM_FIXED, APIC_ERROR_INT }, /* Error */
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{ 1, 1, 1, 1, APIC_LVT_DM_NMI, 0 }, /* PMC */
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{ 1, 1, 1, 1, APIC_LVT_DM_FIXED, APIC_THERMAL_INT }, /* Thermal */
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};
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@ -228,7 +226,11 @@ lapic_init(vm_paddr_t addr)
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setidt(APIC_TIMER_INT, IDTVEC(timerint), SDT_SYS386IGT, SEL_KPL,
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GSEL(GCODE_SEL, SEL_KPL));
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/* XXX: error/thermal interrupts */
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/* Local APIC error interrupt. */
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setidt(APIC_ERROR_INT, IDTVEC(errorint), SDT_SYS386IGT, SEL_KPL,
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GSEL(GCODE_SEL, SEL_KPL));
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/* XXX: Thermal interrupt */
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}
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/*
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@ -281,7 +283,7 @@ lapic_dump(const char* str)
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lapic->id, lapic->version, lapic->ldr, lapic->dfr);
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printf(" lint0: 0x%08x lint1: 0x%08x TPR: 0x%08x SVR: 0x%08x\n",
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lapic->lvt_lint0, lapic->lvt_lint1, lapic->tpr, lapic->svr);
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printf(" timer: 0x%08x therm: 0x%08x err: 0x%08x pcm: 0x%08x\n",
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printf(" timer: 0x%08x therm: 0x%08x err: 0x%08x pmc: 0x%08x\n",
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lapic->lvt_timer, lapic->lvt_thermal, lapic->lvt_error,
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lapic->lvt_pcint);
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}
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@ -329,7 +331,11 @@ lapic_setup(int boot)
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lapic_timer_enable_intr();
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}
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/* XXX: Error and thermal LVTs */
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/* Program error LVT and clear any existing errors. */
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lapic->lvt_error = lvt_mode(la, LVT_ERROR, lapic->lvt_error);
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lapic->esr = 0;
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/* XXX: Thermal LVT */
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intr_restore(eflags);
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}
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@ -725,18 +731,6 @@ lapic_eoi(void)
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lapic->eoi = 0;
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}
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/*
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* Read the contents of the error status register. We have to write
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* to the register first before reading from it.
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*/
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u_int
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lapic_error(void)
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{
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lapic->esr = 0;
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return (lapic->esr);
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}
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void
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lapic_handle_intr(int vector, struct trapframe *frame)
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{
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@ -863,6 +857,24 @@ lapic_timer_enable_intr(void)
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lapic->lvt_timer = value;
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}
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void
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lapic_handle_error(void)
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{
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u_int32_t esr;
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/*
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* Read the contents of the error status register. Write to
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* the register first before reading from it to force the APIC
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* to update its value to indicate any errors that have
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* occurred since the previous write to the register.
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*/
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lapic->esr = 0;
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esr = lapic->esr;
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printf("CPU%d: local APIC error 0x%x\n", PCPU_GET(cpuid), esr);
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lapic_eoi();
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}
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u_int
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apic_cpuid(u_int apic_id)
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{
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@ -208,7 +208,8 @@ struct apic_enumerator {
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inthand_t
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IDTVEC(apic_isr1), IDTVEC(apic_isr2), IDTVEC(apic_isr3),
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IDTVEC(apic_isr4), IDTVEC(apic_isr5), IDTVEC(apic_isr6),
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IDTVEC(apic_isr7), IDTVEC(spuriousint), IDTVEC(timerint);
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IDTVEC(apic_isr7), IDTVEC(errorint), IDTVEC(spuriousint),
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IDTVEC(timerint);
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extern vm_paddr_t lapic_paddr;
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extern int apic_cpuids[];
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@ -240,13 +241,13 @@ void lapic_disable_pmc(void);
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void lapic_dump(const char *str);
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int lapic_enable_pmc(void);
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void lapic_eoi(void);
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u_int lapic_error(void);
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int lapic_id(void);
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void lapic_init(vm_paddr_t addr);
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int lapic_intr_pending(u_int vector);
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void lapic_ipi_raw(register_t icrlo, u_int dest);
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void lapic_ipi_vectored(u_int vector, int dest);
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int lapic_ipi_wait(int delay);
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void lapic_handle_error(void);
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void lapic_handle_intr(int vector, struct trapframe *frame);
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void lapic_handle_timer(struct trapframe *frame);
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void lapic_reenable_pmc(void);
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