Perform warm reset if codec reports ready on attach.
Move AC97 link control power up poke so it is always performed on attach.
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4351e43f7e
commit
6084370fe4
@ -477,24 +477,33 @@ via_attach(device_t dev)
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/* Wake up and reset AC97 if necessary */
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data = pci_read_config(dev, VIA_AC97STATUS, 1);
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if ((data & VIA_AC97STATUS_RDY) == 0) {
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/* Cold reset per ac97r2.3 spec (page 95) */
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pci_write_config(dev, VIA_ACLINKCTRL, 0, 1); /* Assert low */
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DELAY(100); /* Wait T_rst_low */
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pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_NRST, 1); /* Assert high */
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DELAY(1); /* Wait T_rst2clk */
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pci_write_config(dev, VIA_ACLINKCTRL, 0, 1); /* Assert low */
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pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN, 1); /* Assert low */
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DELAY(100); /* Wait T_rst_low */
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pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN | VIA_ACLINK_NRST, 1); /* Assert high */
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DELAY(5); /* Wait T_rst2clk */
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pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN, 1); /* Assert low */
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} else {
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/* Warm reset */
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pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN, 1); /* Force no sync */
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DELAY(100);
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pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN | VIA_ACLINK_SYNC, 1); /* Sync */
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DELAY(5); /* Wait T_sync_high */
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pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN, 1); /* Force no sync */
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DELAY(5); /* Wait T_sync2clk */
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}
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/* Power everything up */
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pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_DESIRED, 1);
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/* Power everything up */
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pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_DESIRED, 1);
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/* Wait for codec to become ready (largest reported delay here 310ms) */
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for (cnt = 0; cnt < 2000; cnt++) {
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data = pci_read_config(dev, VIA_AC97STATUS, 1);
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if (data & VIA_AC97STATUS_RDY)
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break;
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DELAY(5000);
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}
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/* Wait for codec to become ready (largest reported delay here 310ms) */
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for (cnt = 0; cnt < 2000; cnt++) {
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data = pci_read_config(dev, VIA_AC97STATUS, 1);
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if (data & VIA_AC97STATUS_RDY)
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break;
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DELAY(5000);
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}
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via->regid = PCIR_MAPS;
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