Tentatively apply https://reviews.llvm.org/D78877 (by Dave Green):
[ARM] Only produce qadd8b under hasV6Ops When compiling for a arm5te cpu from clang, the +dsp attribute is set. This meant we could try and generate qadd8 instructions where we would end up having no pattern. I've changed the condition here to be hasV6Ops && hasDSP, which is what other parts of ARMISelLowering seem to use for similar instructions. Fixed PR45677. This fixes "fatal error: error in backend: Cannot select: t37: i32 = ARMISD::QADD8b t43, t44" when compiling sys/dev/sound/pcm/feeder_mixer.c for armv5. For some reason we do not encounter this on head, but this error popped up while building universes for stable/12. MFC after: 3 days
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@ -4549,7 +4549,7 @@ SDValue ARMTargetLowering::LowerUnsignedALUO(SDValue Op,
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static SDValue LowerSADDSUBSAT(SDValue Op, SelectionDAG &DAG,
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static SDValue LowerSADDSUBSAT(SDValue Op, SelectionDAG &DAG,
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const ARMSubtarget *Subtarget) {
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const ARMSubtarget *Subtarget) {
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EVT VT = Op.getValueType();
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EVT VT = Op.getValueType();
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if (!Subtarget->hasDSP())
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if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP())
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return SDValue();
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return SDValue();
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if (!VT.isSimple())
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if (!VT.isSimple())
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return SDValue();
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return SDValue();
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