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MFC if_re.c rev. 1.91, if_rlreg.h rev. 1.66 to RELENG_6.

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re(4) devices requires an external EEPROM. Depending on models it
  would be 93C46(1Kbit) or 93C56(2Kbit). One of differences between them
  is number of address lines required to access the EEPROM. For example,
  93C56 EEPROM needs 8 address lines to read/write data. If 93C56
  recevied premature end of required number of serial clock(CLK) to set
  OP code/address of EEPROM, the result would be unexpected behavior.
  Previously it tried to detect 93C46, which requires 6 address lines,
  and then assumed it would be 93C56 if read data was not expected
  value. However, this approach didn't work in some models/situations
  as 93C56 requries 8 address lines to access its data. In order to fix
  it, change EEPROM probing order such that 93C56 is detected reliably.

  While I'm here change hard-coded address line numbers with defined
  constant to enhance readability.

PR:	112710
This commit is contained in:
yongari 2007-07-13 04:46:34 +00:00
parent a44651dc34
commit 639c534bc4
2 changed files with 4 additions and 2 deletions
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4
sys/dev/re/if_re.c
View File

@ -1211,10 +1211,10 @@ re_attach(dev)
hw_rev++;
}
sc->rl_eewidth = 6;
sc->rl_eewidth = RL_9356_ADDR_LEN;
re_read_eeprom(sc, (caddr_t)&re_did, 0, 1);
if (re_did != 0x8129)
sc->rl_eewidth = 8;
sc->rl_eewidth = RL_9346_ADDR_LEN;
/*
* Get station address from the EEPROM.

2
sys/pci/if_rlreg.h
View File

@ -312,6 +312,8 @@
#define RL_EEMODE_WRITECFG (0x80|0x40)
/* 9346 EEPROM commands */
#define RL_9346_ADDR_LEN 6 /* 93C46 1K: 128x16 */
#define RL_9356_ADDR_LEN 8 /* 93C56 2K: 256x16 */
#define RL_9346_WRITE 0x5
#define RL_9346_READ 0x6