Ok I hope I got it right this time.
After discussion with Sam, switch back to use firmware(9) instead of having the firmware in hex format. Put the binary firmware uuencoded into sys/contrib/dev/npe, and slap a LICENSE file, as found on the Intel website. Approved by: re (blanket), mux (mentor) MFC After: 1 week
This commit is contained in:
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@ -104,6 +104,8 @@ device atadisk # ATA disk drives
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device avila_ata # Gateworks CF/IDE support
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device npe # Network Processing Engine
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device npe_fw
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device firmware
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device qmgr # Q Manager (required by npe)
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device miibus # NB: required by npe
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device ether
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File diff suppressed because it is too large
Load Diff
@ -17,8 +17,28 @@ arm/xscale/ixp425/ixp425_a4x_io.S optional uart
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dev/uart/uart_dev_ns8250.c optional uart
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#
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# NPE-based Ethernet support (requires qmgr also).
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#
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arm/xscale/ixp425/if_npe.c optional npe
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arm/xscale/ixp425/ixp425_npe.c optional npe
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ixp425_npe_fw.c optional npe_fw \
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compile-with "${AWK} -f $S/tools/fw_stub.awk IxNpeMicrocode.dat:npe_fw -mnpe -c${.TARGET}" \
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no-implicit-rule before-depend local \
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clean "ixp425_npe_fw.c"
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#
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# NB: ld encodes the path in the binary symbols generated for the
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# firmware image so link the file to the object directory to
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# get known values for reference in the _fw.c file.
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#
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IxNpeMicrocode.fwo optional npe_fw \
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dependency "IxNpeMicrocode.dat" \
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compile-with "${LD} -b binary -d -warn-common -r -d -o ${.TARGET} IxNpeMicrocode.dat" \
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no-implicit-rule \
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clean "IxNpeMicrocode.fwo"
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IxNpeMicrocode.dat optional npe_fw \
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dependency ".PHONY" \
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compile-with "uudecode < $S/contrib/dev/npe/IxNpeMicrocode.dat.uu" \
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no-obj no-implicit-rule \
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clean "IxNpeMicrocode.dat"
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#
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# Q-Manager support
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#
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@ -72,7 +72,10 @@ __FBSDID("$FreeBSD$");
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* The code here basically replaces the npeDl and npeMh classes
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* in the Intel Access Library (IAL).
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*
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* NB: Microcode images comes from ixNpeMicrocode.c
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* NB: Microcode images are loaded with firmware(9). To
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* include microcode in a static kernel include the
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* ixpnpe_fw device. Otherwise the firmware will be
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* automatically loaded from the filesystem.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -84,7 +87,9 @@ __FBSDID("$FreeBSD$");
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <sys/endian.h>
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#include <sys/linker.h>
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#include <sys/firmware.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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@ -97,8 +102,6 @@ __FBSDID("$FreeBSD$");
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#include <arm/xscale/ixp425/ixp425_npereg.h>
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#include <arm/xscale/ixp425/ixp425_npevar.h>
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#include <arm/xscale/ixp425/IxNpeMicrocode.c>
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struct ixpnpe_softc {
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device_t sc_dev;
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bus_space_tag_t sc_iot;
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@ -419,6 +422,7 @@ ixpnpe_init(struct ixpnpe_softc *sc, const char *imageName, uint32_t imageId)
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{
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uint32_t imageSize;
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const uint32_t *imageCodePtr;
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const struct firmware *fw;
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int error;
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DPRINTF(sc->sc_dev, "load %s, imageId 0x%08x\n", imageName, imageId);
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@ -437,8 +441,12 @@ ixpnpe_init(struct ixpnpe_softc *sc, const char *imageName, uint32_t imageId)
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if (error != 0)
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return error;
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error = npe_findimage(sc, IxNpeMicrocode_array, imageId,
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&imageCodePtr, &imageSize);
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fw = firmware_get(imageName);
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if (fw == NULL)
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return ENOENT;
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/* Locate desired image in files w/ combined images */
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error = npe_findimage(sc, fw->data, imageId, &imageCodePtr, &imageSize);
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if (error != 0)
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goto done;
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@ -458,6 +466,7 @@ ixpnpe_init(struct ixpnpe_softc *sc, const char *imageName, uint32_t imageId)
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sc->functionalityId = IX_NPEDL_FUNCTIONID_FROM_IMAGEID_GET(imageId);
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mtx_unlock(&sc->sc_mtx);
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done:
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firmware_put(fw, FIRMWARE_UNLOAD);
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DPRINTF(sc->sc_dev, "%s: error %d\n", __func__, error);
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return error;
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}
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@ -501,8 +510,7 @@ npe_load_ins(struct ixpnpe_softc *sc,
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return EINVAL; /* XXX */
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}
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for (i = 0; i < blockSize; i++, npeMemAddress++) {
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if (npe_ins_write(sc, npeMemAddress, htobe32(bp->data[i]),
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verify) != 0) {
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if (npe_ins_write(sc, npeMemAddress, bp->data[i], verify) != 0) {
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device_printf(sc->sc_dev, "NPE instruction write failed");
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return EIO;
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}
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@ -524,8 +532,7 @@ npe_load_data(struct ixpnpe_softc *sc,
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return EINVAL;
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}
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for (i = 0; i < blockSize; i++, npeMemAddress++) {
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if (npe_data_write(sc, npeMemAddress, htobe32(bp->data[i]), verify)
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!= 0) {
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if (npe_data_write(sc, npeMemAddress, bp->data[i], verify) != 0) {
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device_printf(sc->sc_dev, "NPE data write failed\n");
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return EIO;
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}
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@ -571,7 +578,7 @@ npe_load_stateinfo(struct ixpnpe_softc *sc,
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break;
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}
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if (npe_ctx_reg_write(sc, cNum, reg, htobe32(regVal), verify) != 0) {
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if (npe_ctx_reg_write(sc, cNum, reg, regVal, verify) != 0) {
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device_printf(sc->sc_dev, "write of state-info to NPE failed\n");
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error = EIO;
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break;
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@ -98,14 +98,6 @@
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#define IXP425_NPE_B_IMAGEID 0x01000200
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#define IXP425_NPE_C_IMAGEID 0x02000200
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/* For IxNpeMicrocode.c */
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#define IX_NPEDL_NPEIMAGE_NPEA_HSS_PORT_0_CHAN_PORT_0_BYPASS_ATM_MPHY_4_PORT
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#define IX_NPEDL_NPEIMAGE_NPEA_ETH
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#define IX_NPEDL_NPEIMAGE_NPEA_ETH_HSSCHAN_COEXIST
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#define IX_NPEDL_NPEIMAGE_NPEA_HSS_2_PORT_CHAN_PORT_0_BYPASS
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#define IX_NPEDL_NPEIMAGE_NPEB_ETH
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#define IX_NPEDL_NPEIMAGE_NPEC_ETH
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struct ixpnpe_softc;
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struct ixpnpe_softc *ixpnpe_attach(device_t);
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void ixpnpe_detach(struct ixpnpe_softc *);
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sys/contrib/dev/npe/IxNpeMicrocode.dat.uu
Normal file
803
sys/contrib/dev/npe/IxNpeMicrocode.dat.uu
Normal file
@ -0,0 +1,803 @@
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$FreeBSD$
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begin 644 IxNpeMicrocode.dat
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M_NWP#1"``@$```NL``````````L````!```%7@````$```MB`````0``"Z(`
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M```!```+I0````\````````%41``?A`0`/SP$`!TH!!.O@$%J/R```#YT```
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M=O`0`'0`$`*^`1"$``L0`H@/$`+!_A`"Q?T0`H8#$`*"`A`"__H`6(``$(@`
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M"Q`"P?<0A$&'$`*V`A`"__00```+`"@`"P`2__$);(H@#Y#`$`^H0!`0`KX`
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M$$0`"P'4P```38<(`"V'!``UAP0`&8<$`"&'!`!1AP0`78<$$$1^<`'8P``0
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M`8L1$`&3$1`!FQ$%!(I0!2@0@`4X$I`%1!2@!4`6L`5L&,`%:!K0$`!^$A`"
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M_?402``+#`#```0`Q``)#((0"2A(0!`"O@$)!'=`$`,^`0F,@A`)J$A`$`*^
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
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|
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|
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|
||||
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|
||||
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||||
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|
||||
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||||
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M(!"3/@$%%)0@$(100`"U@*`0```+$`!!C!`!P*``4&`0`!6$H1"0D!<&&)`>
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M$`!W$`5,<1`&)8<D!5R:(!``P4(01'94`H#$!Q`"O`80`%@F$`+5YQ`#.`$0
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M`'<@$)-_]!!$4$`"(,0`$`"0%P88D!X0`O_W$$0`"P``=U`0D``+!5R:(!``
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|
||||
`
|
||||
end
|
12
sys/contrib/dev/npe/LICENSE
Normal file
12
sys/contrib/dev/npe/LICENSE
Normal file
@ -0,0 +1,12 @@
|
||||
$FreeBSD$
|
||||
|
||||
Copyright (c) 2007, Intel Corporation.
|
||||
All rights reserved.
|
||||
|
||||
Redistribution. Redistribution and use in binary form, without modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions must reproduce the above copyright notice and the following disclaimer in the documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of Intel Corporation nor the names of its suppliers may be used to endorse or promote products derived from this software without specific prior written permission.
|
||||
- No reverse engineering, decompilation, or disassembly of this software is permitted.
|
||||
|
||||
Limited patent license. Intel Corporation grants a world-wide, royalty-free, non-exclusive license under patents it now or hereafter owns or controls to make, have made, use, import, offer to sell and sell (¿Utilize¿) this software, but solely to the extent that any such patent is necessary to Utilize the software alone. The patent license shall not apply to any combinations which include this software. No hardware per se is licensed hereunder.
|
||||
DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
Loading…
Reference in New Issue
Block a user