a10_gpio: Enable all needed clocks
Do not enable only the first clock, enable them all.
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177263997c
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64478df5b2
@ -165,6 +165,11 @@ static struct ofw_compat_data compat_data[] = {
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{NULL, 0}
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};
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struct clk_list {
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TAILQ_ENTRY(clk_list) next;
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clk_t clk;
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};
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struct a10_gpio_softc {
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device_t sc_dev;
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device_t sc_busdev;
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@ -175,6 +180,7 @@ struct a10_gpio_softc {
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bus_space_handle_t sc_bsh;
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void * sc_intrhand;
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const struct allwinner_padconf * padconf;
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TAILQ_HEAD(, clk_list) clk_list;
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};
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#define A10_GPIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx)
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@ -766,8 +772,10 @@ a10_gpio_attach(device_t dev)
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int rid, error;
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phandle_t gpio;
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struct a10_gpio_softc *sc;
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struct clk_list *clkp, *clkp_tmp;
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clk_t clk;
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hwreset_t rst;
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hwreset_t rst = NULL;
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int off, err;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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@ -811,12 +819,17 @@ a10_gpio_attach(device_t dev)
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}
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}
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if (clk_get_by_ofw_index(dev, 0, 0, &clk) == 0) {
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error = clk_enable(clk);
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if (error != 0) {
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device_printf(dev, "could not enable clock\n");
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return (error);
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TAILQ_INIT(&sc->clk_list);
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for (off = 0; clk_get_by_ofw_index(dev, 0, off, &clk) == 0; off++) {
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err = clk_enable(clk);
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if (err != 0) {
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device_printf(dev, "Could not enable clock %s\n",
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clk_get_name(clk));
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goto fail;
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}
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clkp = malloc(sizeof(*clkp), M_DEVBUF, M_WAITOK | M_ZERO);
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clkp->clk = clk;
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TAILQ_INSERT_TAIL(&sc->clk_list, clkp, next);
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}
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sc->sc_busdev = gpiobus_attach_bus(dev);
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@ -840,6 +853,26 @@ a10_gpio_attach(device_t dev)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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mtx_destroy(&sc->sc_mtx);
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/* Disable clock */
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TAILQ_FOREACH_SAFE(clkp, &sc->clk_list, next, clkp_tmp) {
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err = clk_disable(clkp->clk);
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if (err != 0)
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device_printf(dev, "Could not disable clock %s\n",
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clk_get_name(clkp->clk));
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err = clk_release(clkp->clk);
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if (err != 0)
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device_printf(dev, "Could not release clock %s\n",
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clk_get_name(clkp->clk));
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TAILQ_REMOVE(&sc->clk_list, clkp, next);
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free(clkp, M_DEVBUF);
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}
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/* Assert resets */
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if (rst) {
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hwreset_assert(rst);
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hwreset_release(rst);
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}
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return (ENXIO);
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}
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