Break out the PLL setup into (mostly) per-chip methods, rather than
polluting the AR5416 code with later chipset support. Note: ar9280InitPLL() supports Merlin (AR9280) and later (AR9285, AR9287.) Submitted by: ssgriffonuser@gmail.com Approved by: re (kib)
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@ -1423,60 +1423,20 @@ ar5416UpdateChainMasks(struct ath_hal *ah, HAL_BOOL is_ht)
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void
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ar5416InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)
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{
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uint32_t pll;
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uint32_t pll = AR_RTC_PLL_REFDIV_5 | AR_RTC_PLL_DIV2;
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if (chan != AH_NULL) {
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if (IEEE80211_IS_CHAN_HALF(chan))
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pll |= SM(0x1, AR_RTC_PLL_CLKSEL);
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else if (IEEE80211_IS_CHAN_QUARTER(chan))
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pll |= SM(0x2, AR_RTC_PLL_CLKSEL);
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if (AR_SREV_MERLIN_20(ah) &&
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chan != AH_NULL && IEEE80211_IS_CHAN_5GHZ(chan)) {
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/*
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* PLL WAR for Merlin 2.0/2.1
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* When doing fast clock, set PLL to 0x142c
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* Else, set PLL to 0x2850 to prevent reset-to-reset variation
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*/
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pll = IS_5GHZ_FAST_CLOCK_EN(ah, chan) ? 0x142c : 0x2850;
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} else if (AR_SREV_MERLIN_10_OR_LATER(ah)) {
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pll = SM(0x5, AR_RTC_SOWL_PLL_REFDIV);
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if (chan != AH_NULL) {
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if (IEEE80211_IS_CHAN_HALF(chan))
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pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL);
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else if (IEEE80211_IS_CHAN_QUARTER(chan))
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pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL);
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if (IEEE80211_IS_CHAN_5GHZ(chan))
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pll |= SM(0x28, AR_RTC_SOWL_PLL_DIV);
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else
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pll |= SM(0x2c, AR_RTC_SOWL_PLL_DIV);
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} else
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pll |= SM(0x2c, AR_RTC_SOWL_PLL_DIV);
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} else if (AR_SREV_SOWL_10_OR_LATER(ah)) {
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pll = SM(0x5, AR_RTC_SOWL_PLL_REFDIV);
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if (chan != AH_NULL) {
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if (IEEE80211_IS_CHAN_HALF(chan))
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pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL);
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else if (IEEE80211_IS_CHAN_QUARTER(chan))
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pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL);
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if (IEEE80211_IS_CHAN_5GHZ(chan))
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pll |= SM(0x50, AR_RTC_SOWL_PLL_DIV);
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else
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pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV);
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} else
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pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV);
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} else {
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pll = AR_RTC_PLL_REFDIV_5 | AR_RTC_PLL_DIV2;
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if (chan != AH_NULL) {
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if (IEEE80211_IS_CHAN_HALF(chan))
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pll |= SM(0x1, AR_RTC_PLL_CLKSEL);
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else if (IEEE80211_IS_CHAN_QUARTER(chan))
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pll |= SM(0x2, AR_RTC_PLL_CLKSEL);
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if (IEEE80211_IS_CHAN_5GHZ(chan))
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pll |= SM(0xa, AR_RTC_PLL_DIV);
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else
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pll |= SM(0xb, AR_RTC_PLL_DIV);
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} else
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if (IEEE80211_IS_CHAN_5GHZ(chan))
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pll |= SM(0xa, AR_RTC_PLL_DIV);
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else
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pll |= SM(0xb, AR_RTC_PLL_DIV);
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}
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} else
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pll |= SM(0xb, AR_RTC_PLL_DIV);
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OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
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/* TODO:
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@ -86,6 +86,28 @@ ar9160AniSetup(struct ath_hal *ah)
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ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE);
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}
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static void
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ar9160InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)
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{
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uint32_t pll = SM(0x5, AR_RTC_SOWL_PLL_REFDIV);
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if (chan != AH_NULL) {
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if (IEEE80211_IS_CHAN_HALF(chan))
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pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL);
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else if (IEEE80211_IS_CHAN_QUARTER(chan))
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pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL);
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if (IEEE80211_IS_CHAN_5GHZ(chan))
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pll |= SM(0x50, AR_RTC_SOWL_PLL_DIV);
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else
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pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV);
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} else
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pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV);
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OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
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OS_DELAY(RTC_PLL_SETTLE_DELAY);
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OS_REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_SLEEP_DERIVED_CLK);
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}
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/*
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* Attach for an AR9160 part.
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*/
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@ -118,6 +140,7 @@ ar9160Attach(uint16_t devid, HAL_SOFTC sc,
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/* XXX override with 9160 specific state */
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/* override 5416 methods for our needs */
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AH5416(ah)->ah_initPLL = ar9160InitPLL;
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AH5416(ah)->ah_cal.iqCalData.calData = &ar9160_iq_cal;
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AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9160_adc_gain_cal;
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@ -59,5 +59,6 @@ struct ath_hal;
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HAL_BOOL ar9280SetAntennaSwitch(struct ath_hal *, HAL_ANT_SETTING);
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void ar9280SpurMitigate(struct ath_hal *,
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const struct ieee80211_channel *);
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void ar9280InitPLL(struct ath_hal *ah,
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const struct ieee80211_channel *chan);
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#endif /* _ATH_AR9280_H_ */
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@ -99,6 +99,39 @@ ar9280AniSetup(struct ath_hal *ah)
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ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE);
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}
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void
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ar9280InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)
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{
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uint32_t pll = SM(0x5, AR_RTC_SOWL_PLL_REFDIV);
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if (AR_SREV_MERLIN_20(ah) &&
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chan != AH_NULL && IEEE80211_IS_CHAN_5GHZ(chan)) {
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/*
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* PLL WAR for Merlin 2.0/2.1
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* When doing fast clock, set PLL to 0x142c
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* Else, set PLL to 0x2850 to prevent reset-to-reset variation
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*/
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pll = IS_5GHZ_FAST_CLOCK_EN(ah, chan) ? 0x142c : 0x2850;
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} else if (AR_SREV_MERLIN_10_OR_LATER(ah)) {
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pll = SM(0x5, AR_RTC_SOWL_PLL_REFDIV);
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if (chan != AH_NULL) {
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if (IEEE80211_IS_CHAN_HALF(chan))
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pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL);
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else if (IEEE80211_IS_CHAN_QUARTER(chan))
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pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL);
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if (IEEE80211_IS_CHAN_5GHZ(chan))
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pll |= SM(0x28, AR_RTC_SOWL_PLL_DIV);
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else
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pll |= SM(0x2c, AR_RTC_SOWL_PLL_DIV);
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} else
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pll |= SM(0x2c, AR_RTC_SOWL_PLL_DIV);
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}
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OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
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OS_DELAY(RTC_PLL_SETTLE_DELAY);
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OS_REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_SLEEP_DERIVED_CLK);
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}
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/* XXX shouldn't be here! */
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#define EEP_MINOR(_ah) \
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(AH_PRIVATE(_ah)->ah_eeversion & AR5416_EEP_VER_MINOR_MASK)
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@ -138,6 +171,8 @@ ar9280Attach(uint16_t devid, HAL_SOFTC sc,
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/* XXX override with 9280 specific state */
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/* override 5416 methods for our needs */
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AH5416(ah)->ah_initPLL = ar9280InitPLL;
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ah->ah_setAntennaSwitch = ar9280SetAntennaSwitch;
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ah->ah_configPCIE = ar9280ConfigPCIE;
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@ -136,6 +136,8 @@ ar9285Attach(uint16_t devid, HAL_SOFTC sc,
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/* XXX override with 9285 specific state */
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/* override 5416 methods for our needs */
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AH5416(ah)->ah_initPLL = ar9280InitPLL;
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ah->ah_setAntennaSwitch = ar9285SetAntennaSwitch;
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ah->ah_configPCIE = ar9285ConfigPCIE;
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ah->ah_setTxPower = ar9285SetTransmitPower;
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@ -137,6 +137,8 @@ ar9287Attach(uint16_t devid, HAL_SOFTC sc,
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/* XXX override with 9280 specific state */
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/* override 5416 methods for our needs */
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AH5416(ah)->ah_initPLL = ar9280InitPLL;
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ah->ah_setAntennaSwitch = ar9287SetAntennaSwitch;
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ah->ah_configPCIE = ar9287ConfigPCIE;
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