Introduce e6000sw etherswitch support
Add e6000sw driver supporting Marvell 88E6352, 88E6172, 88E6176 switches. It needs to be attached to mdio interface, exporting SMI access functionality. e6000sw supports port-based VLAN configuration, per-port media changing, accessing PHY and switch registers. e6000sw attaches miibuses and PHY drivers as children. Instead of typical tick as callout, kthread-based tick is used. This combined with SX locks allows MDIO read/write calls to sleep. It is expected, because this hardware requires long delays in SMI read/write procedures, which can not be handled by busy-waiting. Reviewed by: adrian Obtained from: Semihalf Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Differential revision: https://reviews.freebsd.org/D3902
This commit is contained in:
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parent
4a3e4c4e49
commit
6644b9d363
976
sys/dev/etherswitch/e6000sw/e6000sw.c
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976
sys/dev/etherswitch/e6000sw/e6000sw.c
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@ -0,0 +1,976 @@
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/*-
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* Copyright (c) 2015 Semihalf
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* Copyright (c) 2015 Stormshield
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sockio.h>
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#include <sys/kernel.h>
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#include <sys/kthread.h>
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#include <sys/socket.h>
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#include <sys/module.h>
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#include <sys/errno.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/uio.h>
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#include <sys/fcntl.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <arm/mv/mvwin.h>
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#include <arm/mv/mvreg.h>
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#include <arm/mv/mvvar.h>
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#include <dev/etherswitch/etherswitch.h>
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#include <dev/etherswitch/mdio.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mge/if_mgevar.h>
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#include "e6000swreg.h"
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#include "etherswitch_if.h"
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#include "miibus_if.h"
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#include "mdio_if.h"
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MALLOC_DECLARE(M_E6000SW);
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MALLOC_DEFINE(M_E6000SW, "e6000sw", "e6000sw switch");
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#define E6000SW_LOCK(_sc) \
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sx_xlock(&(_sc)->sx)
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#define E6000SW_UNLOCK(_sc) \
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sx_unlock(&(_sc)->sx)
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#define E6000SW_LOCK_ASSERT(_sc, _what) \
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sx_assert(&(_sc)->sx, (_what))
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#define E6000SW_TRYLOCK(_sc) \
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sx_tryxlock(&(_sc)->sx)
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typedef struct e6000sw_softc {
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device_t dev;
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struct sx sx;
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struct ifnet *ifp[E6000SW_NUM_PHYS];
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char *ifname[E6000SW_NUM_PHYS];
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device_t miibus[E6000SW_NUM_PHYS];
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struct mii_data *mii[E6000SW_NUM_PHYS];
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struct callout tick_callout;
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uint32_t cpuports_mask;
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int vid[E6000SW_NUM_VGROUPS];
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int members[E6000SW_NUM_VGROUPS];
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int vgroup[E6000SW_NUM_PORTS];
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} e6000sw_softc_t;
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static etherswitch_info_t etherswitch_info = {
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.es_nports = E6000SW_NUM_PORTS,
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.es_nvlangroups = E6000SW_NUM_VGROUPS,
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.es_name = "Marvell 6000 series switch"
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};
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static void e6000sw_identify(driver_t *driver, device_t parent);
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static int e6000sw_probe(device_t dev);
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static int e6000sw_attach(device_t dev);
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static int e6000sw_detach(device_t dev);
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static int e6000sw_readphy(device_t dev, int phy, int reg);
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static int e6000sw_writephy(device_t dev, int phy, int reg, int data);
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static etherswitch_info_t* e6000sw_getinfo(device_t dev);
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static void e6000sw_lock(device_t dev);
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static void e6000sw_unlock(device_t dev);
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static int e6000sw_getport(device_t dev, etherswitch_port_t *p);
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static int e6000sw_setport(device_t dev, etherswitch_port_t *p);
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static int e6000sw_readreg_wrapper(device_t dev, int addr_reg);
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static int e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val);
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static int e6000sw_readphy_wrapper(device_t dev, int phy, int reg);
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static int e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data);
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static int e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg);
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static int e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg);
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static int e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg);
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static int e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg);
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static void e6000sw_setup(device_t dev, e6000sw_softc_t *sc);
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static void e6000sw_port_vlan_conf(e6000sw_softc_t *sc);
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static void e6000sw_tick(void *arg);
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static void e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin,
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int flag);
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static int e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag);
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static __inline void e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg,
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int val);
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static __inline uint32_t e6000sw_readreg(e6000sw_softc_t *sc, int addr,
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int reg);
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static int e6000sw_ifmedia_upd(struct ifnet *ifp);
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static void e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr);
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static int e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct
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atu_opt *atu, int flag);
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static int e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid);
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static int e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid);
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static __inline int e6000sw_cpuport(e6000sw_softc_t *sc, int port);
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static __inline struct mii_data *e6000sw_miiforphy(e6000sw_softc_t *sc,
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unsigned int phy);
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static struct proc *e6000sw_kproc;
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static device_method_t e6000sw_methods[] = {
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/* device interface */
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DEVMETHOD(device_identify, e6000sw_identify),
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DEVMETHOD(device_probe, e6000sw_probe),
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DEVMETHOD(device_attach, e6000sw_attach),
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DEVMETHOD(device_detach, e6000sw_detach),
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/* bus interface */
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DEVMETHOD(bus_add_child, device_add_child_ordered),
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/* mii interface */
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DEVMETHOD(miibus_readreg, e6000sw_readphy),
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DEVMETHOD(miibus_writereg, e6000sw_writephy),
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/* etherswitch interface */
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DEVMETHOD(etherswitch_getinfo, e6000sw_getinfo),
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DEVMETHOD(etherswitch_lock, e6000sw_lock),
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DEVMETHOD(etherswitch_unlock, e6000sw_unlock),
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DEVMETHOD(etherswitch_getport, e6000sw_getport),
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DEVMETHOD(etherswitch_setport, e6000sw_setport),
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DEVMETHOD(etherswitch_readreg, e6000sw_readreg_wrapper),
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DEVMETHOD(etherswitch_writereg, e6000sw_writereg_wrapper),
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DEVMETHOD(etherswitch_readphyreg, e6000sw_readphy_wrapper),
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DEVMETHOD(etherswitch_writephyreg, e6000sw_writephy_wrapper),
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DEVMETHOD(etherswitch_setvgroup, e6000sw_setvgroup_wrapper),
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DEVMETHOD(etherswitch_getvgroup, e6000sw_getvgroup_wrapper),
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DEVMETHOD_END
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};
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static devclass_t e6000sw_devclass;
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DEFINE_CLASS_0(e6000sw, e6000sw_driver, e6000sw_methods,
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sizeof(e6000sw_softc_t));
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DRIVER_MODULE(e6000sw, mdio, e6000sw_driver, e6000sw_devclass, 0, 0);
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DRIVER_MODULE(etherswitch, e6000sw, etherswitch_driver, etherswitch_devclass, 0,
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0);
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DRIVER_MODULE(miibus, e6000sw, miibus_driver, miibus_devclass, 0, 0);
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MODULE_DEPEND(e6000sw, mdio, 1, 1, 1);
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static void
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e6000sw_identify(driver_t *driver, device_t parent)
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{
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if (device_find_child(parent, "e6000sw", -1) == NULL)
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BUS_ADD_CHILD(parent, 0, "e6000sw", -1);
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}
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static int
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e6000sw_probe(device_t dev)
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{
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e6000sw_softc_t *sc;
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const char *description;
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unsigned int id;
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sc = device_get_softc(dev);
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bzero(sc, sizeof(e6000sw_softc_t));
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sc->dev = dev;
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/* Lock is necessary due to assertions. */
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sx_init(&sc->sx, "e6000sw");
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E6000SW_LOCK(sc);
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id = e6000sw_readreg(sc, REG_PORT(0), SWITCH_ID);
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switch (id & 0xfff0) {
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case 0x3520:
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description = "Marvell 88E6352";
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break;
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case 0x1720:
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description = "Marvell 88E6172";
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break;
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case 0x1760:
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description = "Marvell 88E6176";
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break;
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default:
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E6000SW_UNLOCK(sc);
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sx_destroy(&sc->sx);
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device_printf(dev, "Unrecognized device.\n");
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return (ENXIO);
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}
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device_set_desc(dev, description);
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E6000SW_UNLOCK(sc);
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return (BUS_PROBE_DEFAULT);
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}
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static int
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e6000sw_attach(device_t dev)
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{
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e6000sw_softc_t *sc;
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int phy, err, port;
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char name[IFNAMSIZ];
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err = 0;
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sc = device_get_softc(dev);
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E6000SW_LOCK(sc);
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sc->cpuports_mask = E6000SW_CPUPORTS_MASK;
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for (port = 0; port < E6000SW_NUM_PORTS; port++)
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sc->vgroup[port] = E6000SW_PORT_NO_VGROUP;
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e6000sw_setup(dev, sc);
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snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->dev));
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for (phy = 0; phy < E6000SW_NUM_PHYS; phy++) {
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sc->ifp[phy] = if_alloc(IFT_ETHER);
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if (sc->ifp[phy] == NULL)
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goto out_fail;
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sc->ifp[phy]->if_softc = sc;
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sc->ifp[phy]->if_flags |= IFF_UP | IFF_BROADCAST |
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IFF_DRV_RUNNING | IFF_SIMPLEX;
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sc->ifname[phy] = malloc(strlen(name) + 1, M_E6000SW, M_WAITOK);
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if (sc->ifname[phy] == NULL)
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goto out_fail;
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bcopy(name, sc->ifname[phy], strlen(name) + 1);
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if_initname(sc->ifp[phy], sc->ifname[phy], phy);
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err = mii_attach(sc->dev, &sc->miibus[phy], sc->ifp[phy],
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e6000sw_ifmedia_upd, e6000sw_ifmedia_sts, BMSR_DEFCAPMASK,
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phy, MII_OFFSET_ANY, 0);
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if (err != 0) {
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device_printf(sc->dev,
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"attaching PHY %d failed\n",
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phy);
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goto out_fail;
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}
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sc->mii[phy] = device_get_softc(sc->miibus[phy]);
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}
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E6000SW_UNLOCK(sc);
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bus_generic_probe(dev);
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bus_enumerate_hinted_children(dev);
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bus_generic_attach(dev);
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kproc_create(e6000sw_tick, sc, &e6000sw_kproc, 0, 0,
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"e6000sw tick kproc");
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return (0);
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out_fail:
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e6000sw_detach(dev);
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return (ENXIO);
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}
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static __inline void
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e6000sw_poll_done(e6000sw_softc_t *sc)
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{
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while (e6000sw_readreg(sc, REG_GLOBAL2, PHY_CMD) &
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(1 << PHY_CMD_SMI_BUSY))
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continue;
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}
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/*
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* PHY registers are paged. Put page index in reg 22 (accessible from every
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* page), then access specific register.
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*/
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static int
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e6000sw_readphy(device_t dev, int phy, int reg)
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{
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e6000sw_softc_t *sc;
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uint32_t val;
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sc = device_get_softc(dev);
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val = 0;
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if (phy >= E6000SW_NUM_PHYS || reg >= E6000SW_NUM_PHY_REGS) {
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device_printf(dev, "Wrong register address.\n");
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return (EINVAL);
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}
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E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
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e6000sw_poll_done(sc);
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val |= 1 << PHY_CMD_SMI_BUSY;
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val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
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val |= PHY_CMD_OPCODE_READ << PHY_CMD_OPCODE;
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val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
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val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
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e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
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e6000sw_poll_done(sc);
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val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG)
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& PHY_DATA_MASK;
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return (val);
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}
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static int
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e6000sw_writephy(device_t dev, int phy, int reg, int data)
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{
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e6000sw_softc_t *sc;
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uint32_t val;
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sc = device_get_softc(dev);
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val = 0;
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if (phy >= E6000SW_NUM_PHYS || reg >= E6000SW_NUM_PHY_REGS) {
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device_printf(dev, "Wrong register address.\n");
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return (EINVAL);
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}
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E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
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e6000sw_poll_done(sc);
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val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
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val |= 1 << PHY_CMD_SMI_BUSY;
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val |= PHY_CMD_OPCODE_WRITE << PHY_CMD_OPCODE;
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val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
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val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
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e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG,
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data & PHY_DATA_MASK);
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e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
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e6000sw_poll_done(sc);
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return (0);
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}
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static int
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e6000sw_detach(device_t dev)
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{
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int phy;
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e6000sw_softc_t *sc;
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sc = device_get_softc(dev);
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bus_generic_detach(dev);
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sx_destroy(&sc->sx);
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for (phy = 0; phy < E6000SW_NUM_PHYS; phy++) {
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if (sc->miibus[phy] != NULL)
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device_delete_child(dev, sc->miibus[phy]);
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if (sc->ifp[phy] != NULL)
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if_free(sc->ifp[phy]);
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if (sc->ifname[phy] != NULL)
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free(sc->ifname[phy], M_E6000SW);
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}
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return (0);
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}
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static etherswitch_info_t*
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e6000sw_getinfo(device_t dev)
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{
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return (ðerswitch_info);
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}
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static void
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e6000sw_lock(device_t dev)
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{
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struct e6000sw_softc *sc;
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sc = device_get_softc(dev);
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E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
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E6000SW_LOCK(sc);
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}
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static void
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e6000sw_unlock(device_t dev)
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{
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struct e6000sw_softc *sc;
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sc = device_get_softc(dev);
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E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
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E6000SW_UNLOCK(sc);
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}
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static int
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e6000sw_getport(device_t dev, etherswitch_port_t *p)
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{
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struct mii_data *mii;
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int err;
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struct ifmediareq *ifmr;
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err = 0;
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e6000sw_softc_t *sc = device_get_softc(dev);
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E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
|
||||
|
||||
E6000SW_LOCK(sc);
|
||||
|
||||
if (p->es_port >= E6000SW_NUM_PORTS ||
|
||||
p->es_port < 0) {
|
||||
err = EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
e6000sw_get_pvid(sc, p->es_port, &p->es_pvid);
|
||||
|
||||
if (e6000sw_cpuport(sc, p->es_port)) {
|
||||
p->es_flags |= ETHERSWITCH_PORT_CPU;
|
||||
ifmr = &p->es_ifmr;
|
||||
ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
|
||||
ifmr->ifm_count = 0;
|
||||
ifmr->ifm_current = ifmr->ifm_active =
|
||||
IFM_ETHER | IFM_1000_T | IFM_FDX;
|
||||
ifmr->ifm_mask = 0;
|
||||
} else {
|
||||
mii = e6000sw_miiforphy(sc, p->es_port);
|
||||
err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
|
||||
&mii->mii_media, SIOCGIFMEDIA);
|
||||
}
|
||||
|
||||
out:
|
||||
E6000SW_UNLOCK(sc);
|
||||
return (err);
|
||||
}
|
||||
|
||||
static int
|
||||
e6000sw_setport(device_t dev, etherswitch_port_t *p)
|
||||
{
|
||||
e6000sw_softc_t *sc;
|
||||
int err;
|
||||
struct mii_data *mii;
|
||||
|
||||
err = 0;
|
||||
sc = device_get_softc(dev);
|
||||
E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
|
||||
|
||||
E6000SW_LOCK(sc);
|
||||
|
||||
if (p->es_port >= E6000SW_NUM_PORTS ||
|
||||
p->es_port < 0) {
|
||||
err = EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (p->es_pvid != 0)
|
||||
e6000sw_set_pvid(sc, p->es_port, p->es_pvid);
|
||||
if (!e6000sw_cpuport(sc, p->es_port)) {
|
||||
mii = e6000sw_miiforphy(sc, p->es_port);
|
||||
err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, &mii->mii_media,
|
||||
SIOCSIFMEDIA);
|
||||
}
|
||||
|
||||
out:
|
||||
E6000SW_UNLOCK(sc);
|
||||
return (err);
|
||||
}
|
||||
|
||||
/*
|
||||
* Registers in this switch are divided into sections, specified in
|
||||
* documentation. So as to access any of them, section index and reg index
|
||||
* is necessary. etherswitchcfg uses only one variable, so indexes were
|
||||
* compressed into addr_reg: 32 * section_index + reg_index.
|
||||
*/
|
||||
static int
|
||||
e6000sw_readreg_wrapper(device_t dev, int addr_reg)
|
||||
{
|
||||
|
||||
if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
|
||||
(addr_reg < (REG_PORT(0) * 32))) {
|
||||
device_printf(dev, "Wrong register address.\n");
|
||||
return (EINVAL);
|
||||
}
|
||||
|
||||
return (e6000sw_readreg(device_get_softc(dev), addr_reg / 32,
|
||||
addr_reg % 32));
|
||||
}
|
||||
|
||||
static int
|
||||
e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val)
|
||||
{
|
||||
|
||||
if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
|
||||
(addr_reg < (REG_PORT(0) * 32))) {
|
||||
device_printf(dev, "Wrong register address.\n");
|
||||
return (EINVAL);
|
||||
}
|
||||
e6000sw_writereg(device_get_softc(dev), addr_reg / 5,
|
||||
addr_reg % 32, val);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* These wrappers are necessary because PHY accesses from etherswitchcfg
|
||||
* need to be synchronized with locks, while miibus PHY accesses do not.
|
||||
*/
|
||||
static int
|
||||
e6000sw_readphy_wrapper(device_t dev, int phy, int reg)
|
||||
{
|
||||
e6000sw_softc_t *sc;
|
||||
int ret;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
|
||||
|
||||
E6000SW_LOCK(sc);
|
||||
ret = e6000sw_readphy(dev, phy, reg);
|
||||
E6000SW_UNLOCK(sc);
|
||||
|
||||
return (ret);
|
||||
}
|
||||
|
||||
static int
|
||||
e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data)
|
||||
{
|
||||
e6000sw_softc_t *sc;
|
||||
int ret;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
|
||||
|
||||
E6000SW_LOCK(sc);
|
||||
ret = e6000sw_writephy(dev, phy, reg, data);
|
||||
E6000SW_UNLOCK(sc);
|
||||
|
||||
return (ret);
|
||||
}
|
||||
|
||||
/*
|
||||
* setvgroup/getvgroup called from etherswitchfcg need to be locked,
|
||||
* while internal calls do not.
|
||||
*/
|
||||
static int
|
||||
e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
|
||||
{
|
||||
e6000sw_softc_t *sc;
|
||||
int ret;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
|
||||
|
||||
E6000SW_LOCK(sc);
|
||||
ret = e6000sw_setvgroup(dev, vg);
|
||||
E6000SW_UNLOCK(sc);
|
||||
|
||||
return (ret);
|
||||
}
|
||||
|
||||
static int
|
||||
e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
|
||||
{
|
||||
e6000sw_softc_t *sc;
|
||||
int ret;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
|
||||
|
||||
E6000SW_LOCK(sc);
|
||||
ret = e6000sw_getvgroup(dev, vg);
|
||||
E6000SW_UNLOCK(sc);
|
||||
|
||||
return (ret);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
e6000sw_flush_port(e6000sw_softc_t *sc, int port)
|
||||
{
|
||||
uint32_t reg;
|
||||
|
||||
reg = e6000sw_readreg(sc, REG_PORT(port),
|
||||
PORT_VLAN_MAP);
|
||||
reg &= ~PORT_VLAN_MAP_TABLE_MASK;
|
||||
reg &= ~PORT_VLAN_MAP_FID_MASK;
|
||||
e6000sw_writereg(sc, REG_PORT(port),
|
||||
PORT_VLAN_MAP, reg);
|
||||
if (sc->vgroup[port] != E6000SW_PORT_NO_VGROUP) {
|
||||
/*
|
||||
* If port belonged somewhere, owner-group
|
||||
* should have its entry removed.
|
||||
*/
|
||||
sc->members[sc->vgroup[port]] &= ~(1 << port);
|
||||
sc->vgroup[port] = E6000SW_PORT_NO_VGROUP;
|
||||
}
|
||||
}
|
||||
|
||||
static __inline void
|
||||
e6000sw_port_assign_vgroup(e6000sw_softc_t *sc, int port, int fid, int vgroup,
|
||||
int members)
|
||||
{
|
||||
uint32_t reg;
|
||||
|
||||
reg = e6000sw_readreg(sc, REG_PORT(port),
|
||||
PORT_VLAN_MAP);
|
||||
reg &= ~PORT_VLAN_MAP_TABLE_MASK;
|
||||
reg &= ~PORT_VLAN_MAP_FID_MASK;
|
||||
reg |= members & ~(1 << port);
|
||||
reg |= (fid << PORT_VLAN_MAP_FID) & PORT_VLAN_MAP_FID_MASK;
|
||||
e6000sw_writereg(sc, REG_PORT(port), PORT_VLAN_MAP,
|
||||
reg);
|
||||
sc->vgroup[port] = vgroup;
|
||||
}
|
||||
|
||||
static int
|
||||
e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
|
||||
{
|
||||
e6000sw_softc_t *sc;
|
||||
int port, fid;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
|
||||
|
||||
if (vg->es_vlangroup >= E6000SW_NUM_VGROUPS)
|
||||
return (EINVAL);
|
||||
if (vg->es_member_ports != vg->es_untagged_ports) {
|
||||
device_printf(dev, "Tagged ports not supported.\n");
|
||||
return (EINVAL);
|
||||
}
|
||||
|
||||
vg->es_untagged_ports &= PORT_VLAN_MAP_TABLE_MASK;
|
||||
fid = vg->es_vlangroup + 1;
|
||||
for (port = 0; port < E6000SW_NUM_PORTS; port++) {
|
||||
if ((sc->members[vg->es_vlangroup] & (1 << port)) ||
|
||||
(vg->es_untagged_ports & (1 << port)))
|
||||
e6000sw_flush_port(sc, port);
|
||||
if (vg->es_untagged_ports & (1 << port))
|
||||
e6000sw_port_assign_vgroup(sc, port, fid,
|
||||
vg->es_vlangroup, vg->es_untagged_ports);
|
||||
}
|
||||
sc->vid[vg->es_vlangroup] = vg->es_vid;
|
||||
sc->members[vg->es_vlangroup] = vg->es_untagged_ports;
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
|
||||
{
|
||||
e6000sw_softc_t *sc;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
|
||||
|
||||
if (vg->es_vlangroup >= E6000SW_NUM_VGROUPS)
|
||||
return (EINVAL);
|
||||
vg->es_untagged_ports = vg->es_member_ports =
|
||||
sc->members[vg->es_vlangroup];
|
||||
vg->es_vid = ETHERSWITCH_VID_VALID;
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static __inline struct mii_data*
|
||||
e6000sw_miiforphy(e6000sw_softc_t *sc, unsigned int phy)
|
||||
{
|
||||
|
||||
if (phy >= E6000SW_NUM_PHYS)
|
||||
return (NULL);
|
||||
|
||||
return (device_get_softc(sc->miibus[phy]));
|
||||
}
|
||||
|
||||
static int
|
||||
e6000sw_ifmedia_upd(struct ifnet *ifp)
|
||||
{
|
||||
e6000sw_softc_t *sc;
|
||||
struct mii_data *mii;
|
||||
|
||||
sc = ifp->if_softc;
|
||||
mii = e6000sw_miiforphy(sc, ifp->if_dunit);
|
||||
if (mii == NULL)
|
||||
return (ENXIO);
|
||||
mii_mediachg(mii);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
|
||||
{
|
||||
e6000sw_softc_t *sc;
|
||||
struct mii_data *mii;
|
||||
|
||||
sc = ifp->if_softc;
|
||||
mii = e6000sw_miiforphy(sc, ifp->if_dunit);
|
||||
|
||||
if (mii == NULL)
|
||||
return;
|
||||
|
||||
mii_pollstat(mii);
|
||||
ifmr->ifm_active = mii->mii_media_active;
|
||||
ifmr->ifm_status = mii->mii_media_status;
|
||||
}
|
||||
|
||||
static __inline uint32_t
|
||||
e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg)
|
||||
{
|
||||
|
||||
E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
|
||||
|
||||
return (MDIO_READREG(device_get_parent(sc->dev), addr, reg));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val)
|
||||
{
|
||||
|
||||
E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
|
||||
|
||||
MDIO_WRITEREG(device_get_parent(sc->dev), addr, reg, val);
|
||||
}
|
||||
|
||||
static __inline int
|
||||
e6000sw_cpuport(e6000sw_softc_t *sc, int port)
|
||||
{
|
||||
|
||||
return (sc->cpuports_mask & (1 << port));
|
||||
}
|
||||
|
||||
static __inline int
|
||||
e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid)
|
||||
{
|
||||
|
||||
e6000sw_writereg(sc, REG_PORT(port), PORT_VID, pvid &
|
||||
PORT_VID_DEF_VID_MASK);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static __inline int
|
||||
e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid)
|
||||
{
|
||||
|
||||
if (pvid == NULL)
|
||||
return (ENXIO);
|
||||
|
||||
*pvid = e6000sw_readreg(sc, REG_PORT(port), PORT_VID) &
|
||||
PORT_VID_DEF_VID_MASK;
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
e6000sw_tick (void *arg)
|
||||
{
|
||||
e6000sw_softc_t *sc;
|
||||
struct mii_softc *miisc;
|
||||
int i;
|
||||
|
||||
sc = arg;
|
||||
|
||||
E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
|
||||
for (;;) {
|
||||
E6000SW_LOCK(sc);
|
||||
for (i = 0; i < E6000SW_NUM_PHYS; i++) {
|
||||
mii_tick(sc->mii[i]);
|
||||
LIST_FOREACH(miisc, &sc->mii[i]->mii_phys, mii_list) {
|
||||
if (IFM_INST(sc->mii[i]->mii_media.ifm_cur->ifm_media)
|
||||
!= miisc->mii_inst)
|
||||
continue;
|
||||
mii_phy_update(miisc, MII_POLLSTAT);
|
||||
}
|
||||
}
|
||||
E6000SW_UNLOCK(sc);
|
||||
pause("e6000sw tick", 1000);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
e6000sw_setup(device_t dev, e6000sw_softc_t *sc)
|
||||
{
|
||||
uint16_t atu_ctrl, atu_age;
|
||||
|
||||
/* Set aging time */
|
||||
e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL,
|
||||
(E6000SW_DEFAULT_AGETIME << ATU_CONTROL_AGETIME) |
|
||||
(1 << ATU_CONTROL_LEARN2ALL));
|
||||
|
||||
/* Send all with specific mac address to cpu port */
|
||||
e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_2x, MGMT_EN_ALL);
|
||||
e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_0x, MGMT_EN_ALL);
|
||||
|
||||
/* Disable Remote Managment */
|
||||
e6000sw_writereg(sc, REG_GLOBAL, SWITCH_GLOBAL_CONTROL2, 0);
|
||||
|
||||
/* Disable loopback filter and flow control messages */
|
||||
e6000sw_writereg(sc, REG_GLOBAL2, SWITCH_MGMT,
|
||||
SWITCH_MGMT_PRI_MASK |
|
||||
(1 << SWITCH_MGMT_RSVD2CPU) |
|
||||
SWITCH_MGMT_FC_PRI_MASK |
|
||||
(1 << SWITCH_MGMT_FORCEFLOW));
|
||||
|
||||
/* Set VLAN configuration */
|
||||
e6000sw_port_vlan_conf(sc);
|
||||
|
||||
e6000sw_atu_flush(dev, sc, NO_OPERATION);
|
||||
e6000sw_atu_mac_table(dev, sc, NULL, NO_OPERATION);
|
||||
e6000sw_set_atustat(dev, sc, 0, COUNT_ALL);
|
||||
|
||||
/* Set ATU AgeTime to 15 seconds */
|
||||
atu_age = 1;
|
||||
|
||||
atu_ctrl = e6000sw_readreg(sc, REG_GLOBAL, ATU_CONTROL);
|
||||
|
||||
/* Set new AgeTime field */
|
||||
atu_ctrl &= ~ATU_CONTROL_AGETIME_MASK;
|
||||
e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, atu_ctrl |
|
||||
(atu_age << ATU_CONTROL_AGETIME));
|
||||
}
|
||||
|
||||
static void
|
||||
e6000sw_port_vlan_conf(e6000sw_softc_t *sc)
|
||||
{
|
||||
int port, ret;
|
||||
etherswitch_vlangroup_t vg;
|
||||
device_t dev;
|
||||
|
||||
dev = sc->dev;
|
||||
/* Disable all ports */
|
||||
for (port = 0; port < E6000SW_NUM_PORTS; port++) {
|
||||
ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
|
||||
e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL,
|
||||
(ret & ~PORT_CONTROL_ENABLE));
|
||||
}
|
||||
|
||||
/* Set port priority */
|
||||
for (port = 0; port < E6000SW_NUM_PORTS; port++) {
|
||||
ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
|
||||
ret &= ~PORT_VID_PRIORITY_MASK;
|
||||
e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
|
||||
}
|
||||
|
||||
vg.es_vlangroup = 0;
|
||||
vg.es_vid = 0;
|
||||
vg.es_member_ports = vg.es_untagged_ports = E6000SW_DEF_VLANGROUP0;
|
||||
e6000sw_setvgroup(dev, &vg);
|
||||
vg.es_vlangroup = 1;
|
||||
vg.es_vid = 1;
|
||||
vg.es_member_ports = vg.es_untagged_ports = E6000SW_DEF_VLANGROUP1;
|
||||
e6000sw_setvgroup(dev, &vg);
|
||||
|
||||
device_printf(dev, "Default vlangroups set.\n");
|
||||
/* Set VID map */
|
||||
for (port = 0; port < E6000SW_NUM_PORTS; port++) {
|
||||
ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
|
||||
ret &= ~PORT_VID_DEF_VID_MASK;
|
||||
ret |= (port + 1);
|
||||
e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
|
||||
}
|
||||
|
||||
/* Enable all ports */
|
||||
for (port = 0; port < E6000SW_NUM_PORTS; port++) {
|
||||
ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
|
||||
e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL, (ret |
|
||||
PORT_CONTROL_ENABLE));
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, int flag)
|
||||
{
|
||||
uint16_t ret;
|
||||
|
||||
ret = e6000sw_readreg(sc, REG_GLOBAL2, ATU_STATS);
|
||||
e6000sw_writereg(sc, REG_GLOBAL2, ATU_STATS, (bin << ATU_STATS_BIN ) |
|
||||
(flag << ATU_STATS_FLAG));
|
||||
}
|
||||
|
||||
static int
|
||||
e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct atu_opt *atu,
|
||||
int flag)
|
||||
{
|
||||
uint16_t ret_opt;
|
||||
uint16_t ret_data;
|
||||
int retries;
|
||||
|
||||
if (flag == NO_OPERATION)
|
||||
return (0);
|
||||
else if ((flag & (LOAD_FROM_FIB | PURGE_FROM_FIB | GET_NEXT_IN_FIB |
|
||||
GET_VIOLATION_DATA | CLEAR_VIOLATION_DATA)) == 0) {
|
||||
device_printf(dev, "Wrong Opcode for ATU operation\n");
|
||||
return (EINVAL);
|
||||
}
|
||||
|
||||
ret_opt = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
|
||||
|
||||
if (ret_opt & ATU_UNIT_BUSY) {
|
||||
device_printf(dev, "ATU unit is busy, cannot access"
|
||||
"register\n");
|
||||
return (EBUSY);
|
||||
} else {
|
||||
if(flag & LOAD_FROM_FIB) {
|
||||
ret_data = e6000sw_readreg(sc, REG_GLOBAL, ATU_DATA);
|
||||
e6000sw_writereg(sc, REG_GLOBAL2, ATU_DATA, (ret_data &
|
||||
~ENTRY_STATE));
|
||||
}
|
||||
e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR01, atu->mac_01);
|
||||
e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR23, atu->mac_23);
|
||||
e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR45, atu->mac_45);
|
||||
e6000sw_writereg(sc, REG_GLOBAL, ATU_FID, atu->fid);
|
||||
|
||||
e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret_opt |
|
||||
ATU_UNIT_BUSY | flag));
|
||||
|
||||
retries = E6000SW_RETRIES;
|
||||
while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
|
||||
ATU_OPERATION) & ATU_UNIT_BUSY))
|
||||
DELAY(1);
|
||||
|
||||
if (retries == 0)
|
||||
device_printf(dev, "Timeout while flushing\n");
|
||||
else if (flag & GET_NEXT_IN_FIB) {
|
||||
atu->mac_01 = e6000sw_readreg(sc, REG_GLOBAL,
|
||||
ATU_MAC_ADDR01);
|
||||
atu->mac_23 = e6000sw_readreg(sc, REG_GLOBAL,
|
||||
ATU_MAC_ADDR23);
|
||||
atu->mac_45 = e6000sw_readreg(sc, REG_GLOBAL,
|
||||
ATU_MAC_ADDR45);
|
||||
}
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag)
|
||||
{
|
||||
uint16_t ret;
|
||||
int retries;
|
||||
|
||||
if (flag == NO_OPERATION)
|
||||
return (0);
|
||||
|
||||
ret = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
|
||||
if (ret & ATU_UNIT_BUSY) {
|
||||
device_printf(dev, "Atu unit is busy, cannot flush\n");
|
||||
return (EBUSY);
|
||||
} else {
|
||||
e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret |
|
||||
ATU_UNIT_BUSY | flag));
|
||||
retries = E6000SW_RETRIES;
|
||||
while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
|
||||
ATU_OPERATION) & ATU_UNIT_BUSY))
|
||||
DELAY(1);
|
||||
|
||||
if (retries == 0)
|
||||
device_printf(dev, "Timeout while flushing\n");
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
185
sys/dev/etherswitch/e6000sw/e6000swreg.h
Normal file
185
sys/dev/etherswitch/e6000sw/e6000swreg.h
Normal file
@ -0,0 +1,185 @@
|
||||
/*-
|
||||
* Copyright (c) 2015 Semihalf
|
||||
* Copyright (c) 2015 Stormshield
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _E6000SWREG_H_
|
||||
#define _E6000SWREG_H_
|
||||
|
||||
struct atu_opt {
|
||||
uint16_t mac_01;
|
||||
uint16_t mac_23;
|
||||
uint16_t mac_45;
|
||||
uint16_t fid;
|
||||
};
|
||||
|
||||
/*
|
||||
* Definitions for the Marvell 88E6000 series Ethernet Switch.
|
||||
*/
|
||||
|
||||
#define CPU_PORT 0x5
|
||||
|
||||
/*
|
||||
* Switch Registers
|
||||
*/
|
||||
#define REG_GLOBAL 0x1b
|
||||
#define REG_GLOBAL2 0x1c
|
||||
#define REG_PORT(p) (0x10 + (p))
|
||||
|
||||
#define REG_NUM_MAX 31
|
||||
|
||||
/*
|
||||
* Per-Port Switch Registers
|
||||
*/
|
||||
#define PORT_STATUS 0x0
|
||||
#define PSC_CONTROL 0x1
|
||||
#define SWITCH_ID 0x3
|
||||
#define PORT_CONTROL 0x4
|
||||
#define PORT_CONTROL_1 0x5
|
||||
#define PORT_VLAN_MAP 0x6
|
||||
#define PORT_VID 0x7
|
||||
#define PORT_ASSOCIATION_VECTOR 0xb
|
||||
#define PORT_ATU_CTRL 0xc
|
||||
#define RX_COUNTER 0x12
|
||||
#define TX_COUNTER 0x13
|
||||
|
||||
#define PORT_VID_DEF_VID 0
|
||||
#define PORT_VID_DEF_VID_MASK 0xfff
|
||||
#define PORT_VID_PRIORITY_MASK 0xc00
|
||||
|
||||
#define PORT_CONTROL_ENABLE 0x3
|
||||
|
||||
/* PORT_VLAN fields */
|
||||
#define PORT_VLAN_MAP_TABLE_MASK 0x7f
|
||||
#define PORT_VLAN_MAP_FID 12
|
||||
#define PORT_VLAN_MAP_FID_MASK 0xf000
|
||||
/*
|
||||
* Switch Global Register 1 accessed via REG_GLOBAL_ADDR
|
||||
*/
|
||||
#define SWITCH_GLOBAL_STATUS 0
|
||||
#define SWITCH_GLOBAL_CONTROL 4
|
||||
#define SWITCH_GLOBAL_CONTROL2 28
|
||||
|
||||
#define MONITOR_CONTROL 26
|
||||
|
||||
/* ATU operation */
|
||||
#define ATU_FID 1
|
||||
#define ATU_CONTROL 10
|
||||
#define ATU_OPERATION 11
|
||||
#define ATU_DATA 12
|
||||
#define ATU_MAC_ADDR01 13
|
||||
#define ATU_MAC_ADDR23 14
|
||||
#define ATU_MAC_ADDR45 15
|
||||
|
||||
#define ATU_UNIT_BUSY (1 << 15)
|
||||
#define ENTRY_STATE 0xf
|
||||
|
||||
/* ATU_CONTROL fields */
|
||||
#define ATU_CONTROL_AGETIME 4
|
||||
#define ATU_CONTROL_AGETIME_MASK 0xff0
|
||||
#define ATU_CONTROL_LEARN2ALL 3
|
||||
|
||||
/* ATU opcode */
|
||||
#define NO_OPERATION (0 << 0)
|
||||
#define FLUSH_ALL (1 << 0)
|
||||
#define FLUSH_NON_STATIC (1 << 1)
|
||||
#define LOAD_FROM_FIB (3 << 0)
|
||||
#define PURGE_FROM_FIB (3 << 0)
|
||||
#define GET_NEXT_IN_FIB (1 << 2)
|
||||
#define FLUSH_ALL_IN_FIB (5 << 0)
|
||||
#define FLUSH_NON_STATIC_IN_FIB (3 << 1)
|
||||
#define GET_VIOLATION_DATA (7 << 0)
|
||||
#define CLEAR_VIOLATION_DATA (7 << 0)
|
||||
|
||||
/* ATU Stats */
|
||||
#define COUNT_ALL (0 << 0)
|
||||
|
||||
/*
|
||||
* Switch Global Register 2 accessed via REG_GLOBAL2_ADDR
|
||||
*/
|
||||
#define MGMT_EN_2x 2
|
||||
#define MGMT_EN_0x 3
|
||||
#define SWITCH_MGMT 5
|
||||
#define ATU_STATS 14
|
||||
|
||||
#define MGMT_EN_ALL 0xffff
|
||||
|
||||
/* SWITCH_MGMT fields */
|
||||
|
||||
#define SWITCH_MGMT_PRI 0
|
||||
#define SWITCH_MGMT_PRI_MASK 7
|
||||
#define SWITCH_MGMT_RSVD2CPU 3
|
||||
#define SWITCH_MGMT_FC_PRI 4
|
||||
#define SWITCH_MGMT_FC_PRI_MASK (7 << 4)
|
||||
#define SWITCH_MGMT_FORCEFLOW 7
|
||||
|
||||
/* ATU_STATS fields */
|
||||
|
||||
#define ATU_STATS_BIN 14
|
||||
#define ATU_STATS_FLAG 12
|
||||
|
||||
/*
|
||||
* PHY registers accessed via 'Switch Global Registers' (REG_GLOBAL2).
|
||||
*/
|
||||
#define SMI_PHY_CMD_REG 0x18
|
||||
#define SMI_PHY_DATA_REG 0x19
|
||||
|
||||
#define PHY_CMD 0x18
|
||||
#define PHY_DATA 0x19
|
||||
#define PHY_DATA_MASK 0xffff
|
||||
|
||||
#define PHY_CMD_SMI_BUSY 15
|
||||
#define PHY_CMD_MODE 12
|
||||
#define PHY_CMD_MODE_MDIO 1
|
||||
#define PHY_CMD_MODE_XMDIO 0
|
||||
#define PHY_CMD_OPCODE 10
|
||||
#define PHY_CMD_OPCODE_WRITE 1
|
||||
#define PHY_CMD_OPCODE_READ 2
|
||||
#define PHY_CMD_DEV_ADDR 5
|
||||
#define PHY_CMD_DEV_ADDR_MASK 0x3e0
|
||||
#define PHY_CMD_REG_ADDR 0
|
||||
#define PHY_CMD_REG_ADDR_MASK 0x1f
|
||||
|
||||
#define PHY_PAGE_REG 22
|
||||
|
||||
#define E6000SW_NUM_PHYS 5
|
||||
#define E6000SW_NUM_PHY_REGS 29
|
||||
#define E6000SW_CPUPORTS_MASK ((1 << 5) | (1 << 6))
|
||||
#define E6000SW_NUM_VGROUPS 8
|
||||
#define E6000SW_NUM_PORTS 7
|
||||
#define E6000SW_PORT_NO_VGROUP -1
|
||||
#define E6000SW_DEFAULT_AGETIME 20
|
||||
#define E6000SW_RETRIES 100
|
||||
|
||||
|
||||
/* Default vlangroups */
|
||||
#define E6000SW_DEF_VLANGROUP0 (1 | (1 << 1) | (1 << 2) | (1 << 3) | \
|
||||
(1 << 6))
|
||||
#define E6000SW_DEF_VLANGROUP1 ((1 << 4) | (1 << 5))
|
||||
|
||||
#endif /* _E6000SWREG_H_ */
|
||||
Loading…
Reference in New Issue
Block a user