- AcpiOsReadPciConfiguration() needs similar fixes as r209965 and r210129.
According to ACPICA User Guide and Programmer Reference, the read data must be zero extended to fill the 64-bit return value even if the bit width of the location is less than 64. - Return error when 64-bit access is requested as we do not support 64-bit PCI register access (yet). XXX We may have to split it up into two 32-bit accesses if it is really required.
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@ -79,9 +79,6 @@ AcpiOsReadPort(ACPI_IO_ADDRESS InPort, UINT32 *Value, UINT32 Width)
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case 32:
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*Value = bus_space_read_4(ACPI_BUS_SPACE_IO, ACPI_BUS_HANDLE, InPort);
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break;
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default:
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/* debug trap goes here */
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break;
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}
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return (AE_OK);
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@ -101,9 +98,6 @@ AcpiOsWritePort(ACPI_IO_ADDRESS OutPort, UINT32 Value, UINT32 Width)
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case 32:
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bus_space_write_4(ACPI_BUS_SPACE_IO, ACPI_BUS_HANDLE, OutPort, Value);
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break;
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default:
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/* debug trap goes here */
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break;
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}
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return (AE_OK);
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@ -113,28 +107,15 @@ ACPI_STATUS
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AcpiOsReadPciConfiguration(ACPI_PCI_ID *PciId, UINT32 Register, void *Value,
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UINT32 Width)
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{
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u_int32_t byte_width = Width / 8;
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u_int32_t val;
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if (Width == 64)
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return (AE_SUPPORT);
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if (!pci_cfgregopen())
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return (AE_NOT_EXIST);
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val = pci_cfgregread(PciId->Bus, PciId->Device, PciId->Function, Register,
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byte_width);
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switch (Width) {
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case 8:
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*(u_int8_t *)Value = val & 0xff;
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break;
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case 16:
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*(u_int16_t *)Value = val & 0xffff;
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break;
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case 32:
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*(u_int32_t *)Value = val;
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break;
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default:
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/* debug trap goes here */
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break;
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}
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*(UINT64 *)Value = pci_cfgregread(PciId->Bus, PciId->Device,
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PciId->Function, Register, Width / 8);
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return (AE_OK);
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}
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@ -144,13 +125,15 @@ ACPI_STATUS
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AcpiOsWritePciConfiguration (ACPI_PCI_ID *PciId, UINT32 Register,
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UINT64 Value, UINT32 Width)
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{
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u_int32_t byte_width = Width / 8;
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if (Width == 64)
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return (AE_SUPPORT);
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if (!pci_cfgregopen())
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return (AE_NOT_EXIST);
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pci_cfgregwrite(PciId->Bus, PciId->Device, PciId->Function, Register,
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Value, byte_width);
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Value, Width / 8);
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return (AE_OK);
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}
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