K6-family MTRR support
This is tested, but I really can't say whether it works entirely. I don't know exactly what to look for when testing it. So let's say this is open for testing. Send any results to green@FreeBSD.org Reviewed by: msmith (long ago)
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# This file tells config what files go into building a kernel,
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# files marked standard are always included.
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#
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# $Id: files.i386,v 1.245 1999/06/01 11:16:23 dfr Exp $
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# $Id: files.i386,v 1.246 1999/06/01 18:18:38 jlemon Exp $
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#
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# The long compile-with and dependency lines are required because of
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# limitations in config: backslash-newline doesn't work in strings, and
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@ -86,6 +86,7 @@ i386/i386/machdep.c standard
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i386/i386/math_emulate.c optional math_emulate
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i386/i386/mem.c standard
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i386/i386/i686_mem.c standard
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i386/i386/k6_mem.c standard
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i386/i386/mp_machdep.c optional smp
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i386/i386/mpapic.c optional smp
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i386/i386/mpboot.s optional smp
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@ -1,7 +1,7 @@
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# This file tells config what files go into building a kernel,
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# files marked standard are always included.
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#
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# $Id: files.i386,v 1.245 1999/06/01 11:16:23 dfr Exp $
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# $Id: files.i386,v 1.246 1999/06/01 18:18:38 jlemon Exp $
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#
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# The long compile-with and dependency lines are required because of
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# limitations in config: backslash-newline doesn't work in strings, and
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@ -86,6 +86,7 @@ i386/i386/machdep.c standard
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i386/i386/math_emulate.c optional math_emulate
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i386/i386/mem.c standard
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i386/i386/i686_mem.c standard
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i386/i386/k6_mem.c standard
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i386/i386/mp_machdep.c optional smp
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i386/i386/mpapic.c optional smp
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i386/i386/mpboot.s optional smp
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192
sys/i386/i386/k6_mem.c
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192
sys/i386/i386/k6_mem.c
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/*-
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* Copyright (c) 1999 Brian Fundakowski Feldman
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id$
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*
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/ioccom.h>
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#include <sys/malloc.h>
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#include <sys/memrange.h>
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#include <machine/md_var.h>
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#include <machine/specialreg.h>
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/*
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* A K6-2 MTRR is defined as the highest 15 bits having the address, the next
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* 15 having the mask, the 1st bit being "write-combining" and the 0th bit
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* being "uncacheable".
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*
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* Address Mask WC UC
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* | XXXXXXXXXXXXXXX | XXXXXXXXXXXXXXX | X | X |
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*
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* There are two of these in the 64-bit UWCCR.
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*/
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/*
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* NOTE: I do _not_ comment my code unless it's truly necessary. Don't
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* expect anything frivolous here, and do NOT touch my bit-shifts
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* unless you want to break this.
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*/
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#define UWCCR 0xc0000085
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#define k6_reg_get(reg, addr, mask, wc, uc) do { \
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addr = (reg) & 0xfffe0000; \
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mask = ((reg) & 0x1fffc) >> 2; \
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wc = ((reg) & 0x2) >> 1; \
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uc = (reg) & 0x1; \
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} while (0)
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#define k6_reg_make(addr, mask, wc, uc) \
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((addr) | ((mask) << 2) | ((wc) << 1) | uc)
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static void k6_mrinit(struct mem_range_softc *sc);
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static int k6_mrset(struct mem_range_softc *, struct mem_range_desc *, int *);
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static __inline int k6_mrmake(struct mem_range_desc *, u_int32_t *);
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static void k6_mem_drvinit(void *);
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static struct mem_range_ops k6_mrops = {
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k6_mrinit,
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k6_mrset,
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NULL
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};
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static __inline int
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k6_mrmake(struct mem_range_desc *desc, u_int32_t *mtrr) {
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u_int32_t len = 0, wc, uc;
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register int bit;
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if (desc->mr_base &~ 0xfffe0000)
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return EINVAL;
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if (desc->mr_len < 131072 || !powerof2(desc->mr_len))
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return EINVAL;
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if (desc->mr_flags &~ (MDF_WRITECOMBINE|MDF_UNCACHEABLE))
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return EOPNOTSUPP;
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for (bit = ffs(desc->mr_len >> 17) - 1; bit < 15; bit++)
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len |= 1 << (14 - bit);
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wc = (desc->mr_flags & MDF_WRITECOMBINE) ? 1 : 0;
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uc = (desc->mr_flags & MDF_UNCACHEABLE) ? 1 : 0;
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*mtrr = k6_reg_make(desc->mr_base, len, wc, uc);
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return 0;
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}
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static void
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k6_mrinit(struct mem_range_softc *sc) {
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u_int64_t reg;
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u_int32_t addr, mask, wc, uc;
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int d;
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sc->mr_cap = 0;
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sc->mr_ndesc = 2; /* XXX (BFF) For now, we only have one msr for this */
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sc->mr_desc = malloc(sc->mr_ndesc * sizeof(struct mem_range_desc),
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M_MEMDESC, M_WAITOK);
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bzero(sc->mr_desc, sc->mr_ndesc * sizeof(struct mem_range_desc));
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reg = rdmsr(UWCCR);
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for (d = 0; d < sc->mr_ndesc; d++) {
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u_int32_t one = (reg & (0xffffffff << (32 * d))) >> (32 * d);
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k6_reg_get(one, addr, mask, wc, uc);
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sc->mr_desc[d].mr_base = addr;
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sc->mr_desc[d].mr_len = ffs(mask) << 17;
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if (wc)
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sc->mr_desc[d].mr_flags |= MDF_WRITECOMBINE;
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if (uc)
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sc->mr_desc[d].mr_flags |= MDF_UNCACHEABLE;
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}
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printf("K6-family MTRR support enabled (%d registers)\n", sc->mr_ndesc);
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}
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static int
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k6_mrset(struct mem_range_softc *sc, struct mem_range_desc *desc, int *arg) {
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u_int64_t reg;
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u_int32_t mtrr;
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int error, d;
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switch (*arg) {
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case MEMRANGE_SET_UPDATE:
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error = k6_mrmake(desc, &mtrr);
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if (error)
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return error;
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for (d = 0; d < sc->mr_ndesc; d++) {
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if (!sc->mr_desc[d].mr_len) {
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sc->mr_desc[d] = *desc;
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goto out;
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}
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if (sc->mr_desc[d].mr_base == desc->mr_base &&
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sc->mr_desc[d].mr_len == desc->mr_len)
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return EEXIST;
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}
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return ENOSPC;
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case MEMRANGE_SET_REMOVE:
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mtrr = 0;
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for (d = 0; d < sc->mr_ndesc; d++)
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if (sc->mr_desc[d].mr_base == desc->mr_base &&
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sc->mr_desc[d].mr_len == desc->mr_len) {
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bzero(&sc->mr_desc[d], sizeof(sc->mr_desc[d]));
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goto out;
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}
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return ENOENT;
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default:
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return EOPNOTSUPP;
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}
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out:
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disable_intr();
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wbinvd();
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invltlb();
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reg = rdmsr(UWCCR);
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reg &= 0xffffffff << (32 * d);
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reg |= mtrr << (32 * d);
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wrmsr(UWCCR, reg);
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wbinvd();
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invltlb();
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enable_intr();
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return 0;
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}
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static void
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k6_mem_drvinit(void *unused) {
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if (!strcmp(cpu_vendor, "AuthenticAMD") &&
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(cpu_id & 0xf00) == 0x500 &&
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((cpu_id & 0xf0) > 0x80 ||
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((cpu_id & 0xf0) == 0x80 &&
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(cpu_id & 0xf) > 0x7))
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)
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mem_range_softc.mr_op = &k6_mrops;
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}
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SYSINIT(k6memdev, SI_SUB_DRIVERS, SI_ORDER_FIRST, k6_mem_drvinit, NULL)
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