The fmodl compat shims on arm/mips/powerpc aren't complete
Disable the test code for now on those architectures MFC after: 1 week PR: 199422
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@ -43,15 +43,21 @@ ATF_TC_BODY(fmod, tc)
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{
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{
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ATF_CHECK(fmodf(2.0, 1.0) == 0);
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ATF_CHECK(fmodf(2.0, 1.0) == 0);
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ATF_CHECK(fmod(2.0, 1.0) == 0);
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ATF_CHECK(fmod(2.0, 1.0) == 0);
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#if !defined(__FreeBSD__) || LDBL_PREC != 53
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ATF_CHECK(fmodl(2.0, 1.0) == 0);
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ATF_CHECK(fmodl(2.0, 1.0) == 0);
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#endif
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ATF_CHECK(fmodf(2.0, 0.5) == 0);
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ATF_CHECK(fmodf(2.0, 0.5) == 0);
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ATF_CHECK(fmod(2.0, 0.5) == 0);
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ATF_CHECK(fmod(2.0, 0.5) == 0);
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#if !defined(__FreeBSD__) || LDBL_PREC != 53
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ATF_CHECK(fmodl(2.0, 0.5) == 0);
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ATF_CHECK(fmodl(2.0, 0.5) == 0);
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#endif
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ATF_CHECK(fabsf(fmodf(1.0, 0.1) - 0.1f) <= 55 * FLT_EPSILON);
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ATF_CHECK(fabsf(fmodf(1.0, 0.1) - 0.1f) <= 55 * FLT_EPSILON);
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ATF_CHECK(fabs(fmod(1.0, 0.1) - 0.1) <= 55 * DBL_EPSILON);
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ATF_CHECK(fabs(fmod(1.0, 0.1) - 0.1) <= 55 * DBL_EPSILON);
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#if !defined(__FreeBSD__) || LDBL_PREC != 53
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ATF_CHECK(fabsl(fmodl(1.0, 0.1L) - 0.1L) <= 55 * LDBL_EPSILON);
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ATF_CHECK(fabsl(fmodl(1.0, 0.1L) - 0.1L) <= 55 * LDBL_EPSILON);
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#endif
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}
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}
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ATF_TP_ADD_TCS(tp)
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ATF_TP_ADD_TCS(tp)
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