Add support for the Highpoint HPT372 based cards (rocketraid 133).
HW Sponsored by: Mike Tancsa
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c9b72549b1
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@ -927,9 +927,12 @@ ata_dmainit(struct ata_channel *ch, int device,
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return;
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case 0x00041103: /* HighPoint HPT366/368/370/372 controllers */
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case 0x00051103: /* HighPoint HPT372 controllers */
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case 0x00081103: /* HighPoint HPT374 controllers */
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if (!ATAPI_DEVICE(ch, device) &&
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udmamode >= 6 && pci_get_revid(parent) >= 0x05 &&
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if (!ATAPI_DEVICE(ch, device) && udmamode >= 6 &&
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((ch->chiptype == 0x00041103 && pci_get_revid(parent) >= 0x05) ||
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(ch->chiptype == 0x00051103 && pci_get_revid(parent) >= 0x01) ||
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(ch->chiptype == 0x00081103 && pci_get_revid(parent) >= 0x07)) &&
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!(pci_read_config(parent, 0x5a, 1) & (ch->unit ? 0x01:0x02))) {
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error = ata_command(atadev, ATA_C_SETFEATURES, 0,
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ATA_UDMA6, ATA_C_F_SETXFER, ATA_WAIT_READY);
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@ -942,8 +945,10 @@ ata_dmainit(struct ata_channel *ch, int device,
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return;
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}
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}
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if (!ATAPI_DEVICE(ch, device) &&
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udmamode >= 5 && pci_get_revid(parent) >= 0x03 &&
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if (!ATAPI_DEVICE(ch, device) && udmamode >= 5 &&
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((ch->chiptype == 0x00041103 && pci_get_revid(parent) >= 0x05) ||
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(ch->chiptype == 0x00051103 && pci_get_revid(parent) >= 0x01) ||
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(ch->chiptype == 0x00081103 && pci_get_revid(parent) >= 0x07)) &&
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!(pci_read_config(parent, 0x5a, 1) & (ch->unit ? 0x01:0x02))) {
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error = ata_command(atadev, ATA_C_SETFEATURES, 0,
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ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
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@ -1213,8 +1218,8 @@ hpt_timing(struct ata_channel *ch, int devno, int mode)
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{
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device_t parent = device_get_parent(ch->dev);
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u_int32_t timing;
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if (pci_get_revid(parent) >= 0x07) { /* HPT374 */
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switch (mode) {
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if (ch->chiptype == 0x00081103 && pci_get_revid(parent) >= 0x07) {
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switch (mode) { /* HPT374 */
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case ATA_PIO0: timing = 0x0ac1f48a; break;
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case ATA_PIO1: timing = 0x0ac1f465; break;
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case ATA_PIO2: timing = 0x0a81f454; break;
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@ -1231,8 +1236,9 @@ hpt_timing(struct ata_channel *ch, int devno, int mode)
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pci_write_config(parent, 0x5b,
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(pci_read_config(parent, 0x5b, 1) & 0x01) | 0x20, 1);
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}
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else if (pci_get_revid(parent) >= 0x05) { /* HPT372 */
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switch (mode) {
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else if ((ch->chiptype == 0x00041103 && pci_get_revid(parent) >= 0x05) ||
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(ch->chiptype == 0x00051103 && pci_get_revid(parent) >= 0x01)) {
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switch (mode) { /* HPT372 */
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case ATA_PIO0: timing = 0x0d029d5e; break;
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case ATA_PIO1: timing = 0x0d029d26; break;
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case ATA_PIO2: timing = 0x0c829ca6; break;
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@ -1246,10 +1252,11 @@ hpt_timing(struct ata_channel *ch, int devno, int mode)
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default: timing = 0x0d029d5e;
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}
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pci_write_config(parent, 0x40 + (devno << 2) , timing, 4);
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pci_write_config(parent, 0x5b, 0x20, 1);
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pci_write_config(parent, 0x5b,
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(pci_read_config(parent, 0x5b, 1) & 0x01) | 0x20, 1);
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}
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else if (pci_get_revid(parent) >= 0x03) { /* HPT370 */
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switch (mode) {
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else if (ch->chiptype == 0x00041103 && pci_get_revid(parent) >= 0x03) {
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switch (mode) { /* HPT370 */
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case ATA_PIO0: timing = 0x06914e57; break;
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case ATA_PIO1: timing = 0x06914e43; break;
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case ATA_PIO2: timing = 0x06514e33; break;
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@ -1264,7 +1271,7 @@ hpt_timing(struct ata_channel *ch, int devno, int mode)
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pci_write_config(parent, 0x40 + (devno << 2) , timing, 4);
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pci_write_config(parent, 0x5b, 0x22, 1);
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}
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else { /* HPT36[68] */
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else { /* HPT36[68] */
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switch (pci_read_config(parent, 0x41 + (devno << 2), 1)) {
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case 0x85: /* 25Mhz */
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switch (mode) {
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@ -276,6 +276,13 @@ ata_pci_match(device_t dev)
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}
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return NULL;
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case 0x00051103:
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switch (pci_get_revid(dev)) {
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case 0x01:
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return "HighPoint HPT372 ATA133 controller";
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}
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return NULL;
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case 0x00081103:
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switch (pci_get_revid(dev)) {
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case 0x07:
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@ -385,30 +392,23 @@ ata_pci_attach(device_t dev)
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ATA_OUTB(controller->bmio, 0x1f, ATA_INB(controller->bmio, 0x1f)|0x01);
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break;
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case 0x00041103: /* HighPoint HPT 366/368/370/372 */
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case 0x00081103: /* HighPoint HPT 374 */
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switch (pci_get_revid(dev)) {
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case 0x00: /* HPT 366 */
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case 0x01:
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case 0x00041103: /* HighPoint HPT366/368/370/372 */
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if (pci_get_revid(dev) < 2) { /* HPT 366 */
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/* turn off interrupt prediction */
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pci_write_config(dev, 0x51,
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(pci_read_config(dev, 0x51, 1) & ~0x80), 1);
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break;
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case 0x02: /* HPT 368 */
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case 0x03: /* HPT 370 */
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case 0x04:
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case 0x05: /* HPT 372 */
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case 0x07: /* HPT 374 */
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/* turn off interrupt prediction */
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pci_write_config(dev, 0x51,
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(pci_read_config(dev, 0x51, 1) & ~0x03), 1);
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pci_write_config(dev, 0x55,
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(pci_read_config(dev, 0x55, 1) & ~0x03), 1);
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/* turn on interrupts */
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pci_write_config(dev, 0x5a,
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(pci_read_config(dev, 0x5a, 1) & ~0x10), 1);
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}
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/* FALLTHROUGH */
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case 0x00051103: /* HighPoint HPT372 */
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case 0x00081103: /* HighPoint HPT374 */
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/* turn off interrupt prediction */
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pci_write_config(dev, 0x51, (pci_read_config(dev, 0x51, 1) & ~0x03), 1);
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pci_write_config(dev, 0x55, (pci_read_config(dev, 0x55, 1) & ~0x03), 1);
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/* turn on interrupts */
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pci_write_config(dev, 0x5a, (pci_read_config(dev, 0x5a, 1) & ~0x10), 1);
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break;
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case 0x05711106: /* VIA 82C586, '596, '686 default setup */
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@ -490,6 +490,7 @@ ata_pci_intr(struct ata_channel *ch)
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*/
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switch (ch->chiptype) {
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case 0x00041103: /* HighPoint HPT366/368/370/372 */
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case 0x00051103: /* HighPoint HPT372 */
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case 0x00081103: /* HighPoint HPT374 */
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if (((dmastat = ata_dmastatus(ch)) &
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(ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT)
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@ -106,6 +106,7 @@ ata_raid_probe(struct ad_softc *adp) {
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return (ar_promise_read_conf(adp, ar_table));
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case 0x00041103:
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case 0x00051103:
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case 0x00081103:
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return (ar_highpoint_read_conf(adp, ar_table));
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}
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