ixgbe(4): Fix enabling/disabling and reconfiguration of queues
- Wrong order of casting and bit shift caused that enabling and disabling queues didn't work properly for queues number larger than 32. Use literals with right suffix instead. - TX ring tail address was not updated during reinitiailzation of TX structures. It could block sending traffic. - Also remove unused variables 'eims' and 'active_queues'. Submitted by: Krzysztof Galazka <krzysztof.galazka@intel.com> Reviewed by: erj@ Sponsored by: Intel Corporation Differential Revision: https://reviews.freebsd.org/D20826
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@ -425,7 +425,6 @@ ixgbe_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs,
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i);
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txr->adapter = que->adapter = adapter;
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adapter->active_queues |= (u64)1 << txr->me;
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/* Allocate report status array */
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txr->tx_rsq = (qidx_t *)malloc(sizeof(qidx_t) * scctx->isc_ntxd[0], M_IXGBE, M_NOWAIT | M_ZERO);
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@ -796,6 +795,8 @@ ixgbe_initialize_transmit_units(if_ctx_t ctx)
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IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
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/* Cache the tail address */
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txr->tail = IXGBE_TDT(txr->me);
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txr->tx_rs_cidx = txr->tx_rs_pidx;
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txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1;
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for (int k = 0; k < scctx->isc_ntxd[0]; k++)
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@ -2002,7 +2003,6 @@ ixgbe_if_msix_intr_assign(if_ctx_t ctx, int msix)
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}
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rx_que->msix = vector;
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adapter->active_queues |= (u64)(1 << rx_que->msix);
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if (adapter->feat_en & IXGBE_FEATURE_RSS) {
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/*
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* The queue ID is used as the RSS layer bucket ID.
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@ -3687,7 +3687,7 @@ ixgbe_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid)
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struct adapter *adapter = iflib_get_softc(ctx);
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struct ix_rx_queue *que = &adapter->rx_queues[rxqid];
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ixgbe_enable_queue(adapter, que->rxr.me);
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ixgbe_enable_queue(adapter, que->msix);
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return (0);
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} /* ixgbe_if_rx_queue_intr_enable */
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@ -3699,7 +3699,7 @@ static void
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ixgbe_enable_queue(struct adapter *adapter, u32 vector)
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{
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struct ixgbe_hw *hw = &adapter->hw;
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u64 queue = (u64)(1 << vector);
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u64 queue = 1ULL << vector;
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u32 mask;
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if (hw->mac.type == ixgbe_mac_82598EB) {
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@ -3722,7 +3722,7 @@ static void
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ixgbe_disable_queue(struct adapter *adapter, u32 vector)
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{
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struct ixgbe_hw *hw = &adapter->hw;
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u64 queue = (u64)(1 << vector);
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u64 queue = 1ULL << vector;
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u32 mask;
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if (hw->mac.type == ixgbe_mac_82598EB) {
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@ -268,7 +268,6 @@ ixv_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs,
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txr->me = i;
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txr->adapter = que->adapter = adapter;
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adapter->active_queues |= (u64)1 << txr->me;
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/* Allocate report status array */
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if (!(txr->tx_rsq = (qidx_t *)malloc(sizeof(qidx_t) * scctx->isc_ntxd[0], M_DEVBUF, M_NOWAIT | M_ZERO))) {
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@ -1038,8 +1037,6 @@ ixv_if_msix_intr_assign(if_ctx_t ctx, int msix)
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}
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rx_que->msix = vector;
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adapter->active_queues |= (u64)(1 << rx_que->msix);
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}
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for (int i = 0; i < adapter->num_tx_queues; i++) {
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@ -339,7 +339,6 @@ struct rx_ring {
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struct ix_rx_queue {
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struct adapter *adapter;
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u32 msix; /* This queue's MSIX vector */
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u32 eims; /* This queue's EIMS bit */
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u32 eitr_setting;
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struct resource *res;
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void *tag;
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@ -442,7 +441,6 @@ struct adapter {
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*/
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struct ix_tx_queue *tx_queues;
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struct ix_rx_queue *rx_queues;
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u64 active_queues;
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/* Multicast array memory */
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struct ixgbe_mc_addr *mta;
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