Add some fixes to the 11n aggregation HAL calls:
* preserve AR_TxIntrReq on every descriptor in an aggregate chain, not just the first descriptor; * always blank out the descriptor in ar5416ChainTxDesc() when forming aggregates - the way I'm using this in the 11n branch is to first chain aggregates together, then use the other HAL calls to fill in the details.
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@ -295,12 +295,14 @@ ar5416FillTxDesc(struct ath_hal *ah, struct ath_desc *ds,
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* copy the multi-rate transmit parameters from
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* the first frame for processing on completion.
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*/
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ads->ds_ctl0 = 0;
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ads->ds_ctl1 = segLen;
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#ifdef AH_NEED_DESC_SWAP
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ads->ds_ctl0 = __bswap32(AR5416DESC_CONST(ds0)->ds_ctl0)
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& AR_TxIntrReq;
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ads->ds_ctl2 = __bswap32(AR5416DESC_CONST(ds0)->ds_ctl2);
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ads->ds_ctl3 = __bswap32(AR5416DESC_CONST(ds0)->ds_ctl3);
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#else
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ads->ds_ctl0 = AR5416DESC_CONST(ds0)->ds_ctl0 & AR_TxIntrReq;
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ads->ds_ctl2 = AR5416DESC_CONST(ds0)->ds_ctl2;
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ads->ds_ctl3 = AR5416DESC_CONST(ds0)->ds_ctl3;
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#endif
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@ -308,7 +310,12 @@ ar5416FillTxDesc(struct ath_hal *ah, struct ath_desc *ds,
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/*
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* Intermediate descriptor in a multi-descriptor frame.
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*/
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ads->ds_ctl0 = 0;
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#ifdef AH_NEED_DESC_SWAP
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ads->ds_ctl0 = __bswap32(AR5416DESC_CONST(ds0)->ds_ctl0)
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& AR_TxIntrReq;
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#else
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ads->ds_ctl0 = AR5416DESC_CONST(ds0)->ds_ctl0 & AR_TxIntrReq;
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#endif
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ads->ds_ctl1 = segLen | AR_TxMore;
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ads->ds_ctl2 = 0;
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ads->ds_ctl3 = 0;
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@ -318,6 +325,9 @@ ar5416FillTxDesc(struct ath_hal *ah, struct ath_desc *ds,
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return AH_TRUE;
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}
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/*
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* NB: cipher is no longer used, it's calculated.
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*/
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HAL_BOOL
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ar5416ChainTxDesc(struct ath_hal *ah, struct ath_desc *ds,
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u_int pktLen,
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@ -347,10 +357,20 @@ ar5416ChainTxDesc(struct ath_hal *ah, struct ath_desc *ds,
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isaggr = 1;
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}
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if (!firstSeg) {
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OS_MEMZERO(ds->ds_hw, AR5416_DESC_TX_CTL_SZ);
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}
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/*
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* Since this function is called before any of the other
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* descriptor setup functions (at least in this particular
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* 802.11n aggregation implementation), always bzero() the
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* descriptor. Previously this would be done for all but
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* the first segment.
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* XXX TODO: figure out why; perhaps I'm using this slightly
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* XXX incorrectly.
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*/
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OS_MEMZERO(ds->ds_hw, AR5416_DESC_TX_CTL_SZ);
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/*
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* Note: VEOL should only be for the last descriptor in the chain.
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*/
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ads->ds_ctl0 = (pktLen & AR_FrameLen);
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ads->ds_ctl1 = (type << AR_FrameType_S)
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| (isaggr ? (AR_IsAggr | AR_MoreAggr) : 0);
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@ -362,7 +382,7 @@ ar5416ChainTxDesc(struct ath_hal *ah, struct ath_desc *ds,
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ads->ds_ctl0 |= AR_DestIdxValid;
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}
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ads->ds_ctl6 = SM(ahp->ah_keytype[cipher], AR_EncrType);
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ads->ds_ctl6 |= SM(ahp->ah_keytype[keyIx], AR_EncrType);
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if (isaggr) {
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ads->ds_ctl6 |= SM(delims, AR_PadDelim);
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}
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