powerpc/booke: Use power-of-two mappings in 64-bit pmap_mapdev
Summary: This reduces the precious TLB1 entry consumption (64 possible in existing 64-bit cores), by adjusting the size and alignment of a device mapping to a power of 2, to encompass the full mapping and its surroundings. One caveat with this: If a mapping really is smaller than a power of 2, it's possible to get a machine check or hang if the 'missing' physical space is accessed. In practice this should not be an issue for users, as devices overwhelmingly have physical spaces on power-of-two sizes and alignments, and any design that includes devices which don't follow this can be addressed by undefining the POW2_MAPPINGS guard. Reviewed by: bdragon Differential Revision: https://reviews.freebsd.org/D24248
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@ -128,6 +128,10 @@ __FBSDID("$FreeBSD$");
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#include "mmu_if.h"
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#define SPARSE_MAPDEV
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/* Use power-of-two mappings in mmu_booke_mapdev(), to save entries. */
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#define POW2_MAPPINGS
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#ifdef DEBUG
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#define debugf(fmt, args...) printf(fmt, ##args)
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#else
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@ -2211,6 +2215,8 @@ tlb1_find_pa(vm_paddr_t pa, tlb_entry_t *e)
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for (i = 0; i < TLB1_ENTRIES; i++) {
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tlb1_read_entry(e, i);
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if ((e->mas1 & MAS1_VALID) == 0)
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continue;
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if (e->phys == pa)
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return (i);
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}
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return (-1);
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@ -2224,7 +2230,7 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_size_t size, vm_memattr_t ma)
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#ifndef __powerpc64__
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uintptr_t tmpva;
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#endif
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uintptr_t va;
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uintptr_t va, retva;
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vm_size_t sz;
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int i;
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int wimge;
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@ -2245,7 +2251,7 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_size_t size, vm_memattr_t ma)
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if (tmppa >= e.phys && tmppa < e.phys + e.size) {
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va = e.virt + (pa - e.phys);
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tmppa = e.phys + e.size;
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sz -= MIN(sz, e.size);
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sz -= MIN(sz, e.size - (pa - e.phys));
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while (sz > 0 && (i = tlb1_find_pa(tmppa, &e)) != -1) {
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if (wimge != (e.mas2 & (MAS2_WIMGE_MASK & ~_TLB_ENTRY_SHARED)))
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break;
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@ -2264,6 +2270,25 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_size_t size, vm_memattr_t ma)
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KASSERT(pa < VM_MAPDEV_PA_MAX,
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("Unsupported physical address! %lx", pa));
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va = VM_MAPDEV_BASE + pa;
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retva = va;
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#ifdef POW2_MAPPINGS
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/*
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* Align the mapping to a power of 2 size, taking into account that we
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* may need to increase the size multiple times to satisfy the size and
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* alignment requirements.
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*
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* This works in the general case because it's very rare (near never?)
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* to have different access properties (WIMG) within a single
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* power-of-two region. If a design does call for that, POW2_MAPPINGS
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* can be undefined, and exact mappings will be used instead.
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*/
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sz = size;
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size = roundup2(size, 1 << ilog2(size));
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while (rounddown2(va, size) + size < va + sz)
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size <<= 1;
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va = rounddown2(va, size);
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pa = rounddown2(pa, size);
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#endif
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#else
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/*
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* The device mapping area is between VM_MAXUSER_ADDRESS and
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@ -2288,14 +2313,15 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_size_t size, vm_memattr_t ma)
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sz = sz ? min(roundup(sz + 3, 4), flsl(size) - 1) : flsl(size) - 1;
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va = roundup(tlb1_map_base, 1 << sz) | (((1 << sz) - 1) & pa);
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} while (!atomic_cmpset_int(&tlb1_map_base, tmpva, va + size));
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va = atomic_fetchadd_int(&tlb1_map_base, size);
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#endif
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va = atomic_fetchadd_int(&tlb1_map_base, size);
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retva = va;
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#endif
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if (tlb1_mapin_region(va, pa, size, tlb_calc_wimg(pa, ma)) != size)
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return (NULL);
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return ((void *)va);
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return ((void *)retva);
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}
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/*
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@ -2583,6 +2609,24 @@ tlb1_find_free(void)
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return (-1);
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}
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static void
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tlb1_purge_va_range(vm_offset_t va, vm_size_t size)
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{
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tlb_entry_t e;
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int i;
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for (i = 0; i < TLB1_ENTRIES; i++) {
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tlb1_read_entry(&e, i);
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if ((e.mas1 & MAS1_VALID) == 0)
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continue;
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if ((e.mas2 & MAS2_EPN_MASK) >= va &&
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(e.mas2 & MAS2_EPN_MASK) < va + size) {
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mtspr(SPR_MAS1, e.mas1 & ~MAS1_VALID);
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__asm __volatile("isync; tlbwe; isync; msync");
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}
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}
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}
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static void
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tlb1_write_entry_int(void *arg)
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{
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@ -2591,6 +2635,7 @@ tlb1_write_entry_int(void *arg)
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idx = args->idx;
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if (idx == -1) {
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tlb1_purge_va_range(args->e->virt, args->e->size);
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idx = tlb1_find_free();
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if (idx == -1)
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panic("No free TLB1 entries!\n");
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