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Make the hardware memory and instruction barrier functions work on armv4

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and armv5 as well.
This commit is contained in:
Ian Lepore 2014-05-11 00:43:06 +00:00
parent 76f66be6bf
commit 6af0d51bce
2 changed files with 5 additions and 3 deletions
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6
sys/arm/include/atomic.h
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@ -58,9 +58,9 @@
#define dsb() __asm __volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0) : "memory")
#define dmb() __asm __volatile("mcr p15, 0, %0, c7, c10, 5" : : "r" (0) : "memory")
#else
#define isb()
#define dsb()
#define dmb()
#define isb() __asm __volatile("mcr p15, 0, %0, c7, c5, 4" : : "r" (0) : "memory")
#define dsb() __asm __volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0) : "memory")
#define dmb() dsb()
#endif
#define mb() dmb()

2
sys/modules/Makefile
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@ -2,6 +2,8 @@
.include <src.opts.mk>
SUBDIR_PARALLEL=
# Modules that include binary-only blobs of microcode should be selectable by
# MK_SOURCELESS_UCODE option (see below).