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- Complete the myri10ge -> mxge name change by doing a mechanical

Browse Source 
s/myri10ge/mxge/g replacement in the myri10ge files.  A few contuation
  lines were joined because of the regained columns.
- Hook the mxge driver back to the build.
This commit is contained in:
Andrew Gallatin 2006-06-13 13:53:52 +00:00
parent b41f1452d9
commit 6d87a65da4
10 changed files with 455 additions and 469 deletions
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1
share/man/man4/Makefile
View File

@ -165,6 +165,7 @@ MAN= aac.4 \
mpt.4 \
mtio.4 \
multicast.4 \
mxge.4 \
my.4 \
natm.4 \
natmip.4 \

22
share/man/man4/mxge.4
View File

@ -35,7 +35,7 @@
.Dt MYRI10GE 4
.Os
.Sh NAME
.Nm myri10ge
.Nm mxge
.Nd "Myricom Myri10GE 10 Gigabit Ethernet adapter driver"
.Sh SYNOPSIS
To compile this driver into the kernel,
@ -43,16 +43,16 @@ place the following lines in your
kernel configuration file:
.Bd -ragged -offset indent
.Cd "device firmware"
.Cd "device myri10ge"
.Cd "device mxge"
.Ed
.Pp
Alternatively, to load the driver as a
module at boot time, place the following line in
.Xr loader.conf 5 :
.Bd -literal -offset indent
if_myri10ge_load="YES"
myri10ge_ethp_z8e_load="YES"
myri10ge_eth_z8e_load="YES"
if_mxge_load="YES"
mxge_ethp_z8e_load="YES"
mxge_eth_z8e_load="YES"
.Ed
.Sh DESCRIPTION
The
@ -96,13 +96,13 @@ Tunables can be set at the
prompt before booting the kernel or stored in
.Xr loader.conf 5 .
.Bl -tag -width indent
.It Va hw.myri10ge.flow_control_enabled
.It Va hw.mxge.flow_control_enabled
Whether or not hardware flow control is enabled on the adapter.
The default value is 1.
.It Va hw.myri10ge.intr_coal_delay
.It Va hw.mxge.intr_coal_delay
This value delays the generation of all interrupts in units of
1 microsecond. The default value is 30.
.It Va hw.myri10ge.skip_pio_read
.It Va hw.mxge.skip_pio_read
This value determines whether or not the driver may omit doing a
pio read in the interrupt handler which ensures that the interrupt
line has been deasserted when using xPIC interrupts. A non-zero value
@ -111,11 +111,11 @@ spurious interrupts. The default value is 0.
.El
.Sh DIAGNOSTICS
.Bl -diag
.It "myri10ge%d: Unable to allocate bus resource: memory"
.It "mxge%d: Unable to allocate bus resource: memory"
A fatal initialization error has occurred.
.It "myri10ge%d: Unable to allocate bus resource: interrupt"
.It "mxge%d: Unable to allocate bus resource: interrupt"
A fatal initialization error has occurred.
.It "myri10ge%d: Could not find firmware image %s"
.It "mxge%d: Could not find firmware image %s"
The appropriate firmware kld module was not installed. This is a
fatal initialization error.
.El

660
sys/dev/mxge/if_mxge.c
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File diff suppressed because it is too large Load Diff

68
sys/dev/mxge/if_mxge_var.h
View File

@ -33,36 +33,36 @@ $FreeBSD$
***************************************************************************/
#define MYRI10GE_MAX_ETHER_MTU 9014
#define MXGE_MAX_ETHER_MTU 9014
#define MYRI10GE_ETH_STOPPED 0
#define MYRI10GE_ETH_STOPPING 1
#define MYRI10GE_ETH_STARTING 2
#define MYRI10GE_ETH_RUNNING 3
#define MYRI10GE_ETH_OPEN_FAILED 4
#define MXGE_ETH_STOPPED 0
#define MXGE_ETH_STOPPING 1
#define MXGE_ETH_STARTING 2
#define MXGE_ETH_RUNNING 3
#define MXGE_ETH_OPEN_FAILED 4
#define MYRI10GE_FW_OFFSET 1024*1024
#define MYRI10GE_EEPROM_STRINGS_SIZE 256
#define MYRI10GE_NUM_INTRQS 2
#define MXGE_FW_OFFSET 1024*1024
#define MXGE_EEPROM_STRINGS_SIZE 256
#define MXGE_NUM_INTRQS 2
typedef struct {
void *addr;
bus_addr_t bus_addr;
bus_dma_tag_t dmat;
bus_dmamap_t map;
} myri10ge_dma_t;
} mxge_dma_t;
typedef struct myri10ge_intrq
typedef struct mxge_intrq
{
mcp_slot_t *q[MYRI10GE_NUM_INTRQS];
mcp_slot_t *q[MXGE_NUM_INTRQS];
int intrq;
int slot;
int maxslots;
uint32_t seqnum;
uint32_t spurious;
uint32_t cnt;
myri10ge_dma_t dma[MYRI10GE_NUM_INTRQS];
} myri10ge_intrq_t;
mxge_dma_t dma[MXGE_NUM_INTRQS];
} mxge_intrq_t;
typedef struct
@ -70,9 +70,9 @@ typedef struct
uint32_t data0;
uint32_t data1;
uint32_t data2;
} myri10ge_cmd_t;
} mxge_cmd_t;
struct myri10ge_buffer_state {
struct mxge_buffer_state {
struct mbuf *m;
bus_dmamap_t map;
};
@ -82,13 +82,13 @@ typedef struct
volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */
volatile uint8_t *wc_fifo; /* w/c rx dma addr fifo address */
mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */
struct myri10ge_buffer_state *info;
struct mxge_buffer_state *info;
bus_dma_tag_t dmat;
bus_dmamap_t extra_map;
int cnt;
int alloc_fail;
int mask; /* number of rx slots -1 */
} myri10ge_rx_buf_t;
} mxge_rx_buf_t;
typedef struct
{
@ -96,13 +96,13 @@ typedef struct
volatile uint8_t *wc_fifo; /* w/c send fifo address */
mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */
char *req_bytes;
struct myri10ge_buffer_state *info;
struct mxge_buffer_state *info;
bus_dma_tag_t dmat;
int req; /* transmits submitted */
int mask; /* number of transmit slots -1 */
int done; /* transmits completed */
int boundary; /* boundary transmits cannot cross*/
} myri10ge_tx_buf_t;
} mxge_tx_buf_t;
typedef struct {
struct ifnet* ifp;
@ -110,9 +110,9 @@ typedef struct {
struct mtx tx_lock;
int csum_flag; /* rx_csums? */
uint8_t mac_addr[6]; /* eeprom mac address */
myri10ge_tx_buf_t tx; /* transmit ring */
myri10ge_rx_buf_t rx_small;
myri10ge_rx_buf_t rx_big;
mxge_tx_buf_t tx; /* transmit ring */
mxge_rx_buf_t rx_small;
mxge_rx_buf_t rx_big;
bus_dma_tag_t parent_dmat;
volatile uint8_t *sram;
int sram_size;
@ -120,13 +120,13 @@ typedef struct {
char *mac_addr_string;
char *product_code_string;
mcp_cmd_response_t *cmd;
myri10ge_dma_t cmd_dma;
myri10ge_dma_t zeropad_dma;
mxge_dma_t cmd_dma;
mxge_dma_t zeropad_dma;
mcp_stats_t *fw_stats;
myri10ge_dma_t fw_stats_dma;
mxge_dma_t fw_stats_dma;
struct pci_dev *pdev;
int msi_enabled;
myri10ge_intrq_t intr;
mxge_intrq_t intr;
int link_state;
unsigned int rdma_tags_available;
int intr_coal_delay;
@ -143,19 +143,19 @@ typedef struct {
struct resource *irq_res;
void *ih;
char *fw_name;
char eeprom_strings[MYRI10GE_EEPROM_STRINGS_SIZE];
char eeprom_strings[MXGE_EEPROM_STRINGS_SIZE];
char fw_version[128];
device_t dev;
struct ifmedia media;
} myri10ge_softc_t;
} mxge_softc_t;
#define MYRI10GE_PCI_VENDOR_MYRICOM 0x14c1
#define MYRI10GE_PCI_DEVICE_Z8E 0x0008
#define MXGE_PCI_VENDOR_MYRICOM 0x14c1
#define MXGE_PCI_DEVICE_Z8E 0x0008
#define MYRI10GE_HIGHPART_TO_U32(X) \
#define MXGE_HIGHPART_TO_U32(X) \
(sizeof (X) == 8) ? ((uint32_t)((uint64_t)(X) >> 32)) : (0)
#define MYRI10GE_LOWPART_TO_U32(X) ((uint32_t)(X))
#define MXGE_LOWPART_TO_U32(X) ((uint32_t)(X))
/* implement our own memory barriers, since bus_space_barrier
@ -176,7 +176,7 @@ typedef struct {
#endif
static inline void
myri10ge_pio_copy(volatile void *to_v, void *from_v, size_t size)
mxge_pio_copy(volatile void *to_v, void *from_v, size_t size)
{
register volatile uintptr_t *to;
volatile uintptr_t *from;

134
sys/dev/mxge/mxge_mcp.h
View File

@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE.
$FreeBSD$
***************************************************************************/
#ifndef _myri10ge_mcp_h
#define _myri10ge_mcp_h
#ifndef _mxge_mcp_h
#define _mxge_mcp_h
#ifdef MYRI10GE_MCP
#ifdef MXGE_MCP
typedef signed char int8_t;
typedef signed short int16_t;
typedef signed int int32_t;
@ -98,22 +98,22 @@ typedef struct
The PADDED flags is set if the packet needs to be padded, and it
must be set for all segments.
The MYRI10GE_MCP_ETHER_FLAGS_ALIGN_ODD must be set if the cumulative
The MXGE_MCP_ETHER_FLAGS_ALIGN_ODD must be set if the cumulative
length of all previous segments was odd.
*/
#define MYRI10GE_MCP_ETHER_FLAGS_VALID 0x1
#define MYRI10GE_MCP_ETHER_FLAGS_FIRST 0x2
#define MYRI10GE_MCP_ETHER_FLAGS_ALIGN_ODD 0x4
#define MYRI10GE_MCP_ETHER_FLAGS_CKSUM 0x8
#define MYRI10GE_MCP_ETHER_FLAGS_SMALL 0x10
#define MYRI10GE_MCP_ETHER_FLAGS_NOT_LAST 0x100
#define MYRI10GE_MCP_ETHER_FLAGS_TSO_HDR 0x200
#define MYRI10GE_MCP_ETHER_FLAGS_TSO 0x400
#define MXGE_MCP_ETHER_FLAGS_VALID 0x1
#define MXGE_MCP_ETHER_FLAGS_FIRST 0x2
#define MXGE_MCP_ETHER_FLAGS_ALIGN_ODD 0x4
#define MXGE_MCP_ETHER_FLAGS_CKSUM 0x8
#define MXGE_MCP_ETHER_FLAGS_SMALL 0x10
#define MXGE_MCP_ETHER_FLAGS_NOT_LAST 0x100
#define MXGE_MCP_ETHER_FLAGS_TSO_HDR 0x200
#define MXGE_MCP_ETHER_FLAGS_TSO 0x400
#define MYRI10GE_MCP_ETHER_SEND_SMALL_SIZE 1520
#define MYRI10GE_MCP_ETHER_MAX_MTU 9400
#define MXGE_MCP_ETHER_SEND_SMALL_SIZE 1520
#define MXGE_MCP_ETHER_MAX_MTU 9400
typedef union mcp_pso_or_cumlen
{
@ -121,8 +121,8 @@ typedef union mcp_pso_or_cumlen
uint16_t cum_len;
} mcp_pso_or_cumlen_t;
#define MYRI10GE_MCP_ETHER_MAX_SEND_DESC 12
#define MYRI10GE_MCP_ETHER_PAD 2
#define MXGE_MCP_ETHER_MAX_SEND_DESC 12
#define MXGE_MCP_ETHER_PAD 2
/* 16 Bytes */
typedef struct
@ -146,63 +146,63 @@ typedef struct
/* Commands */
#define MYRI10GE_MCP_CMD_OFFSET 0xf80000
#define MXGE_MCP_CMD_OFFSET 0xf80000
typedef enum {
MYRI10GE_MCP_CMD_NONE = 0,
MXGE_MCP_CMD_NONE = 0,
/* Reset the mcp, it is left in a safe state, waiting
for the driver to set all its parameters */
MYRI10GE_MCP_CMD_RESET,
MXGE_MCP_CMD_RESET,
/* get the version number of the current firmware..
(may be available in the eeprom strings..? */
MYRI10GE_MCP_GET_MCP_VERSION,
MXGE_MCP_GET_MCP_VERSION,
/* Parameters which must be set by the driver before it can
issue MYRI10GE_MCP_CMD_ETHERNET_UP. They persist until the next
MYRI10GE_MCP_CMD_RESET is issued */
issue MXGE_MCP_CMD_ETHERNET_UP. They persist until the next
MXGE_MCP_CMD_RESET is issued */
MYRI10GE_MCP_CMD_SET_INTRQ0_DMA,
MYRI10GE_MCP_CMD_SET_INTRQ1_DMA,
MYRI10GE_MCP_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */
MYRI10GE_MCP_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */
MXGE_MCP_CMD_SET_INTRQ0_DMA,
MXGE_MCP_CMD_SET_INTRQ1_DMA,
MXGE_MCP_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */
MXGE_MCP_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */
/* Parameters which refer to lanai SRAM addresses where the
driver must issue PIO writes for various things */
MYRI10GE_MCP_CMD_GET_SEND_OFFSET,
MYRI10GE_MCP_CMD_GET_SMALL_RX_OFFSET,
MYRI10GE_MCP_CMD_GET_BIG_RX_OFFSET,
MYRI10GE_MCP_CMD_GET_IRQ_ACK_OFFSET,
MYRI10GE_MCP_CMD_GET_IRQ_DEASSERT_OFFSET,
MYRI10GE_MCP_CMD_GET_IRQ_ACK_DEASSERT_OFFSET,
MXGE_MCP_CMD_GET_SEND_OFFSET,
MXGE_MCP_CMD_GET_SMALL_RX_OFFSET,
MXGE_MCP_CMD_GET_BIG_RX_OFFSET,
MXGE_MCP_CMD_GET_IRQ_ACK_OFFSET,
MXGE_MCP_CMD_GET_IRQ_DEASSERT_OFFSET,
MXGE_MCP_CMD_GET_IRQ_ACK_DEASSERT_OFFSET,
/* Parameters which refer to rings stored on the MCP,
and whose size is controlled by the mcp */
MYRI10GE_MCP_CMD_GET_SEND_RING_SIZE, /* in bytes */
MYRI10GE_MCP_CMD_GET_RX_RING_SIZE, /* in bytes */
MXGE_MCP_CMD_GET_SEND_RING_SIZE, /* in bytes */
MXGE_MCP_CMD_GET_RX_RING_SIZE, /* in bytes */
/* Parameters which refer to rings stored in the host,
and whose size is controlled by the host. Note that
all must be physically contiguous and must contain
a power of 2 number of entries. */
MYRI10GE_MCP_CMD_SET_INTRQ_SIZE, /* in bytes */
MXGE_MCP_CMD_SET_INTRQ_SIZE, /* in bytes */
/* command to bring ethernet interface up. Above parameters
(plus mtu & mac address) must have been exchanged prior
to issuing this command */
MYRI10GE_MCP_CMD_ETHERNET_UP,
MXGE_MCP_CMD_ETHERNET_UP,
/* command to bring ethernet interface down. No further sends
or receives may be processed until an MYRI10GE_MCP_CMD_ETHERNET_UP
or receives may be processed until an MXGE_MCP_CMD_ETHERNET_UP
is issued, and all interrupt queues must be flushed prior
to ack'ing this command */
MYRI10GE_MCP_CMD_ETHERNET_DOWN,
MXGE_MCP_CMD_ETHERNET_DOWN,
/* commands the driver may issue live, without resetting
the nic. Note that increasing the mtu "live" should
@ -210,41 +210,41 @@ typedef enum {
sufficiently large to handle the new mtu. Decreasing
the mtu live is safe */
MYRI10GE_MCP_CMD_SET_MTU,
MYRI10GE_MCP_CMD_SET_INTR_COAL_DELAY, /* in microseconds */
MYRI10GE_MCP_CMD_SET_STATS_INTERVAL, /* in microseconds */
MYRI10GE_MCP_CMD_SET_STATS_DMA,
MXGE_MCP_CMD_SET_MTU,
MXGE_MCP_CMD_SET_INTR_COAL_DELAY, /* in microseconds */
MXGE_MCP_CMD_SET_STATS_INTERVAL, /* in microseconds */
MXGE_MCP_CMD_SET_STATS_DMA,
MYRI10GE_MCP_ENABLE_PROMISC,
MYRI10GE_MCP_DISABLE_PROMISC,
MYRI10GE_MCP_SET_MAC_ADDRESS,
MXGE_MCP_ENABLE_PROMISC,
MXGE_MCP_DISABLE_PROMISC,
MXGE_MCP_SET_MAC_ADDRESS,
MYRI10GE_MCP_ENABLE_FLOW_CONTROL,
MYRI10GE_MCP_DISABLE_FLOW_CONTROL
} myri10ge_mcp_cmd_type_t;
MXGE_MCP_ENABLE_FLOW_CONTROL,
MXGE_MCP_DISABLE_FLOW_CONTROL
} mxge_mcp_cmd_type_t;
typedef enum {
MYRI10GE_MCP_CMD_OK = 0,
MYRI10GE_MCP_CMD_UNKNOWN,
MYRI10GE_MCP_CMD_ERROR_RANGE,
MYRI10GE_MCP_CMD_ERROR_BUSY,
MYRI10GE_MCP_CMD_ERROR_EMPTY,
MYRI10GE_MCP_CMD_ERROR_CLOSED,
MYRI10GE_MCP_CMD_ERROR_HASH_ERROR,
MYRI10GE_MCP_CMD_ERROR_BAD_PORT,
MYRI10GE_MCP_CMD_ERROR_RESOURCES
} myri10ge_mcp_cmd_status_t;
MXGE_MCP_CMD_OK = 0,
MXGE_MCP_CMD_UNKNOWN,
MXGE_MCP_CMD_ERROR_RANGE,
MXGE_MCP_CMD_ERROR_BUSY,
MXGE_MCP_CMD_ERROR_EMPTY,
MXGE_MCP_CMD_ERROR_CLOSED,
MXGE_MCP_CMD_ERROR_HASH_ERROR,
MXGE_MCP_CMD_ERROR_BAD_PORT,
MXGE_MCP_CMD_ERROR_RESOURCES
} mxge_mcp_cmd_status_t;
typedef enum {
MYRI10GE_MCP_INTR_NONE = 0,
MYRI10GE_MCP_INTR_ETHER_SEND_DONE,
MYRI10GE_MCP_INTR_ETHER_RECV_SMALL,
MYRI10GE_MCP_INTR_ETHER_RECV_BIG,
MYRI10GE_MCP_INTR_LINK_CHANGE,
MYRI10GE_MCP_INTR_STATS_UPDATE,
MYRI10GE_MCP_INTR_ETHER_DOWN
} myri10ge_mcp_intr_type_t;
MXGE_MCP_INTR_NONE = 0,
MXGE_MCP_INTR_ETHER_SEND_DONE,
MXGE_MCP_INTR_ETHER_RECV_SMALL,
MXGE_MCP_INTR_ETHER_RECV_BIG,
MXGE_MCP_INTR_LINK_CHANGE,
MXGE_MCP_INTR_STATS_UPDATE,
MXGE_MCP_INTR_ETHER_DOWN
} mxge_mcp_intr_type_t;
/* 32 Bytes */
@ -262,4 +262,4 @@ typedef struct
} mcp_stats_t;
#endif /* _myri10ge_mcp_h */
#endif /* _mxge_mcp_h */

3
sys/modules/Makefile
View File

@ -160,6 +160,7 @@ SUBDIR= ${_3dfx} \
msdosfs \
msdosfs_iconv \
${_mse} \
${_mxge} \
my \
${_ncp} \
${_ncv} \
@ -413,6 +414,7 @@ _ips= ips
_ipw= ipw
_iwi= iwi
_mly= mly
_mxge= mxge
_nve= nve
.if ${MK_CRYPT} != "no" || defined(ALL_MODULES)
.if exists(${.CURDIR}/../crypto/via)
@ -469,6 +471,7 @@ _ips= ips
_ipw= ipw
_iwi= iwi
_mly= mly
_mxge= mxge
_ndis= ndis
_nve= nve
_pccard= pccard

6
sys/modules/mxge/Makefile
View File

@ -1,7 +1,7 @@
# $FreeBSD$
SUBDIR= myri10ge
SUBDIR+=myri10ge_eth_z8e
SUBDIR+=myri10ge_ethp_z8e
SUBDIR= mxge
SUBDIR+=mxge_eth_z8e
SUBDIR+=mxge_ethp_z8e
.include <bsd.subdir.mk>

6
sys/modules/mxge/mxge/Makefile
View File

@ -1,8 +1,8 @@
#$FreeBSD$
.PATH: ${.CURDIR}/../../../dev/myri10ge
.PATH: ${.CURDIR}/../../../dev/mxge
KMOD= if_myri10ge
SRCS= if_myri10ge.c device_if.h bus_if.h pci_if.h
KMOD= if_mxge
SRCS= if_mxge.c device_if.h bus_if.h pci_if.h
.include <bsd.kmod.mk>

12
sys/modules/mxge/mxge_eth_z8e/Makefile
View File

@ -1,13 +1,13 @@
# $FreeBSD$
MYRI10GE= ${.CURDIR}/../../../dev/myri10ge
.PATH= ${MYRI10GE}
KMOD= myri10ge_eth_z8e
FIRMWS= eth_z8e.dat:myri10ge_eth_z8e
MXGE= ${.CURDIR}/../../../dev/mxge
.PATH= ${MXGE}
KMOD= mxge_eth_z8e
FIRMWS= eth_z8e.dat:mxge_eth_z8e
CLEANFILES+= eth_z8e.dat
eth_z8e.dat: ${MYRI10GE}/eth_z8e.dat.gz.uu
uudecode -p < ${MYRI10GE}/eth_z8e.dat.gz.uu \
eth_z8e.dat: ${MXGE}/eth_z8e.dat.gz.uu
uudecode -p < ${MXGE}/eth_z8e.dat.gz.uu \
| gzip -dc > ${.TARGET}
.include <bsd.kmod.mk>

12
sys/modules/mxge/mxge_ethp_z8e/Makefile
View File

@ -1,13 +1,13 @@
# $FreeBSD$
MYRI10GE= ${.CURDIR}/../../../dev/myri10ge
.PATH= ${MYRI10GE}
KMOD= myri10ge_ethp_z8e
FIRMWS= ethp_z8e.dat:myri10ge_ethp_z8e
MXGE= ${.CURDIR}/../../../dev/mxge
.PATH= ${MXGE}
KMOD= mxge_ethp_z8e
FIRMWS= ethp_z8e.dat:mxge_ethp_z8e
CLEANFILES+= ethp_z8e.dat
ethp_z8e.dat: ${MYRI10GE}/ethp_z8e.dat.gz.uu
uudecode -p < ${MYRI10GE}/ethp_z8e.dat.gz.uu \
ethp_z8e.dat: ${MXGE}/ethp_z8e.dat.gz.uu
uudecode -p < ${MXGE}/ethp_z8e.dat.gz.uu \
| gzip -dc > ${.TARGET}
.include <bsd.kmod.mk>