NTB: MFV c529aa30: Xeon Doorbell errata workaround

Modifications to the 14th bit of the B2BDOORBELL register will not be
mirrored to the remote system due to a hardware issue.  To get around
the issue, shrink the number of available doorbell bits by 1.  The max
number of doorbells was being used as a way to referencing the Link
Doorbell bit.  Since this would no longer work, the driver must now
explicitly reference that bit.

This does not affect the xeon_errata_workaround case, as it is not using
the b2bdoorbell register.

Authored by:	Jon Mason
Obtained from:	Linux (Dual BSD/GPL driver)
Sponsored by:	EMC / Isilon Storage Division
This commit is contained in:
Conrad Meyer 2015-10-13 23:41:06 +00:00
parent a2668e8128
commit 6d960015e2
2 changed files with 16 additions and 2 deletions

View File

@ -479,7 +479,7 @@ ntb_setup_interrupts(struct ntb_softc *ntb)
ntb_reg_write(8, ntb->reg_ofs.ldb_mask, ~0);
else
ntb_reg_write(2, ntb->reg_ofs.ldb_mask,
~(1 << ntb->limits.max_db_bits));
(uint16_t) ~(1 << XEON_LINK_DB));
num_vectors = MIN(pci_msix_count(ntb->device),
ntb->limits.max_db_bits);
@ -616,7 +616,7 @@ handle_xeon_event_irq(void *arg)
device_printf(ntb->device, "Error determining link status\n");
/* bit 15 is always the link bit */
ntb_reg_write(2, ntb->reg_ofs.ldb, 1 << ntb->limits.max_db_bits);
ntb_reg_write(2, ntb->reg_ofs.ldb, 1 << XEON_LINK_DB);
}
static void
@ -784,6 +784,19 @@ ntb_setup_xeon(struct ntb_softc *ntb)
ntb->limits.msix_cnt = XEON_MSIX_CNT;
ntb->bits_per_vector = XEON_DB_BITS_PER_VEC;
/*
* HW Errata on bit 14 of b2bdoorbell register. Writes will not be
* mirrored to the remote system. Shrink the number of bits by one,
* since bit 14 is the last bit.
*
* On REGS_THRU_MW errata mode, we don't use the b2bdoorbell register
* anyway. Nor for non-B2B connection types.
*/
if (HAS_FEATURE(NTB_B2BDOORBELL_BIT14) &&
!HAS_FEATURE(NTB_REGS_THRU_MW) &&
connection_type == NTB_CONN_B2B)
ntb->limits.max_db_bits = XEON_MAX_DB_BITS - 1;
configure_xeon_secondary_side_bars(ntb);
/* Enable Bus Master and Memory Space on the secondary side */

View File

@ -38,6 +38,7 @@
#define XEON_MAX_COMPAT_SPADS 16
/* Reserve the uppermost bit for link interrupt */
#define XEON_MAX_DB_BITS 15
#define XEON_LINK_DB 15
#define XEON_DB_BITS_PER_VEC 5
#define XEON_DB_HW_LINK 0x8000