ioat(4) should use bus_dma(9) for the operation source and destination
addresses Reviewed by: cem Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D19725
This commit is contained in:
tychon
parent
87228e148f
commit
6fcd6bd4ce
@ -320,10 +320,26 @@ ioat_attach(device_t device)
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return (error);
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}
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static inline int
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ioat_bus_dmamap_destroy(struct ioat_softc *ioat, const char *func,
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bus_dma_tag_t dmat, bus_dmamap_t map)
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{
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int error;
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error = bus_dmamap_destroy(dmat, map);
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if (error != 0) {
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ioat_log_message(0,
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"%s: bus_dmamap_destroy failed %d\n", func, error);
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}
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return (error);
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}
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static int
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ioat_detach(device_t device)
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{
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struct ioat_softc *ioat;
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int i, error;
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ioat = DEVICE2SOFTC(device);
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@ -359,6 +375,47 @@ ioat_detach(device_t device)
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bus_release_resource(device, SYS_RES_MEMORY,
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ioat->pci_resource_id, ioat->pci_resource);
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if (ioat->data_tag != NULL) {
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for (i = 0; i < 1 << ioat->ring_size_order; i++) {
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error = ioat_bus_dmamap_destroy(ioat, __func__,
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ioat->data_tag, ioat->ring[i].src_dmamap);
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if (error != 0)
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return (error);
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}
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for (i = 0; i < 1 << ioat->ring_size_order; i++) {
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error = ioat_bus_dmamap_destroy(ioat, __func__,
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ioat->data_tag, ioat->ring[i].dst_dmamap);
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if (error != 0)
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return (error);
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}
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for (i = 0; i < 1 << ioat->ring_size_order; i++) {
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error = ioat_bus_dmamap_destroy(ioat, __func__,
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ioat->data_tag, ioat->ring[i].src2_dmamap);
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if (error != 0)
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return (error);
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}
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for (i = 0; i < 1 << ioat->ring_size_order; i++) {
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error = ioat_bus_dmamap_destroy(ioat, __func__,
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ioat->data_tag, ioat->ring[i].dst2_dmamap);
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if (error != 0)
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return (error);
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}
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bus_dma_tag_destroy(ioat->data_tag);
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}
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if (ioat->data_crc_tag != NULL) {
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for (i = 0; i < 1 << ioat->ring_size_order; i++) {
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error = ioat_bus_dmamap_destroy(ioat, __func__,
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ioat->data_crc_tag, ioat->ring[i].crc_dmamap);
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if (error != 0)
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return (error);
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}
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bus_dma_tag_destroy(ioat->data_crc_tag);
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}
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if (ioat->ring != NULL)
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ioat_free_ring(ioat, 1 << ioat->ring_size_order, ioat->ring);
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@ -523,6 +580,25 @@ ioat3_attach(device_t device)
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ioat->hw_desc_ring = hw_desc;
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error = bus_dma_tag_create(bus_get_dma_tag(ioat->device),
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1, 0, BUS_SPACE_MAXADDR_40BIT, BUS_SPACE_MAXADDR, NULL, NULL,
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ioat->max_xfer_size, 1, ioat->max_xfer_size, 0, NULL, NULL,
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&ioat->data_crc_tag);
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if (error != 0) {
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ioat_log_message(0, "%s: bus_dma_tag_create failed %d\n",
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__func__, error);
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return (error);
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}
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error = bus_dma_tag_create(bus_get_dma_tag(ioat->device),
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1, 0, BUS_SPACE_MAXADDR_48BIT, BUS_SPACE_MAXADDR, NULL, NULL,
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ioat->max_xfer_size, 1, ioat->max_xfer_size, 0, NULL, NULL,
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&ioat->data_tag);
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if (error != 0) {
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ioat_log_message(0, "%s: bus_dma_tag_create failed %d\n",
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__func__, error);
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return (error);
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}
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ioat->ring = malloc(num_descriptors * sizeof(*ring), M_IOAT,
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M_ZERO | M_WAITOK);
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@ -530,6 +606,46 @@ ioat3_attach(device_t device)
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for (i = 0; i < num_descriptors; i++) {
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memset(&ring[i].bus_dmadesc, 0, sizeof(ring[i].bus_dmadesc));
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ring[i].id = i;
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error = bus_dmamap_create(ioat->data_tag, 0,
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&ring[i].src_dmamap);
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if (error != 0) {
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ioat_log_message(0,
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"%s: bus_dmamap_create failed %d\n", __func__,
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error);
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return (error);
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}
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error = bus_dmamap_create(ioat->data_tag, 0,
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&ring[i].dst_dmamap);
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if (error != 0) {
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ioat_log_message(0,
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"%s: bus_dmamap_create failed %d\n", __func__,
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error);
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return (error);
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}
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error = bus_dmamap_create(ioat->data_tag, 0,
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&ring[i].src2_dmamap);
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if (error != 0) {
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ioat_log_message(0,
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"%s: bus_dmamap_create failed %d\n", __func__,
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error);
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return (error);
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}
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error = bus_dmamap_create(ioat->data_tag, 0,
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&ring[i].dst2_dmamap);
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if (error != 0) {
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ioat_log_message(0,
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"%s: bus_dmamap_create failed %d\n", __func__,
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error);
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return (error);
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}
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error = bus_dmamap_create(ioat->data_crc_tag, 0,
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&ring[i].crc_dmamap);
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if (error != 0) {
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ioat_log_message(0,
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"%s: bus_dmamap_create failed %d\n", __func__,
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error);
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return (error);
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}
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}
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for (i = 0; i < num_descriptors; i++) {
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@ -724,6 +840,12 @@ ioat_process_events(struct ioat_softc *ioat, boolean_t intr)
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ioat->chan_idx, ioat->tail, dmadesc, dmadesc->callback_fn,
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dmadesc->callback_arg);
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bus_dmamap_unload(ioat->data_tag, desc->src_dmamap);
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bus_dmamap_unload(ioat->data_tag, desc->dst_dmamap);
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bus_dmamap_unload(ioat->data_tag, desc->src2_dmamap);
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bus_dmamap_unload(ioat->data_tag, desc->dst2_dmamap);
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bus_dmamap_unload(ioat->data_crc_tag, desc->crc_dmamap);
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if (dmadesc->callback_fn != NULL)
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dmadesc->callback_fn(dmadesc->callback_arg, 0);
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@ -999,7 +1121,8 @@ ioat_op_generic(struct ioat_softc *ioat, uint8_t op,
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{
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struct ioat_generic_hw_descriptor *hw_desc;
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struct ioat_descriptor *desc;
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int mflags;
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bus_dma_segment_t seg;
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int mflags, nseg, error;
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mtx_assert(&ioat->submit_lock, MA_OWNED);
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@ -1032,8 +1155,30 @@ ioat_op_generic(struct ioat_softc *ioat, uint8_t op,
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hw_desc->u.control_generic.fence = 1;
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hw_desc->size = size;
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hw_desc->src_addr = src;
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hw_desc->dest_addr = dst;
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if (src != 0) {
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nseg = -1;
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error = _bus_dmamap_load_phys(ioat->data_tag, desc->src_dmamap,
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src, size, 0, &seg, &nseg);
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if (error != 0) {
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ioat_log_message(0, "%s: _bus_dmamap_load_phys"
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" failed %d\n", __func__, error);
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return (NULL);
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}
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hw_desc->src_addr = seg.ds_addr;
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}
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if (dst != 0) {
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nseg = -1;
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error = _bus_dmamap_load_phys(ioat->data_tag, desc->dst_dmamap,
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dst, size, 0, &seg, &nseg);
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if (error != 0) {
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ioat_log_message(0, "%s: _bus_dmamap_load_phys"
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" failed %d\n", __func__, error);
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return (NULL);
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}
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hw_desc->dest_addr = seg.ds_addr;
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}
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desc->bus_dmadesc.callback_fn = callback_fn;
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desc->bus_dmadesc.callback_arg = callback_arg;
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@ -1102,6 +1247,9 @@ ioat_copy_8k_aligned(bus_dmaengine_t dmaengine, bus_addr_t dst1,
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struct ioat_dma_hw_descriptor *hw_desc;
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struct ioat_descriptor *desc;
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struct ioat_softc *ioat;
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bus_size_t src1_len, dst1_len;
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bus_dma_segment_t seg;
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int nseg, error;
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ioat = to_ioat_softc(dmaengine);
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CTR2(KTR_IOAT, "%s channel=%u", __func__, ioat->chan_idx);
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@ -1117,19 +1265,57 @@ ioat_copy_8k_aligned(bus_dmaengine_t dmaengine, bus_addr_t dst1,
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return (NULL);
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}
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desc = ioat_op_generic(ioat, IOAT_OP_COPY, 2 * PAGE_SIZE, src1, dst1,
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desc = ioat_op_generic(ioat, IOAT_OP_COPY, 2 * PAGE_SIZE, 0, 0,
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callback_fn, callback_arg, flags);
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if (desc == NULL)
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return (NULL);
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hw_desc = &ioat_get_descriptor(ioat, desc->id)->dma;
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if (src2 != src1 + PAGE_SIZE) {
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hw_desc->u.control.src_page_break = 1;
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hw_desc->next_src_addr = src2;
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src1_len = (src2 != src1 + PAGE_SIZE) ? PAGE_SIZE : 2 * PAGE_SIZE;
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nseg = -1;
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error = _bus_dmamap_load_phys(ioat->data_tag,
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desc->src_dmamap, src1, src1_len, 0, &seg, &nseg);
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if (error != 0) {
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ioat_log_message(0, "%s: _bus_dmamap_load_phys"
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" failed %d\n", __func__, error);
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return (NULL);
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}
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if (dst2 != dst1 + PAGE_SIZE) {
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hw_desc->src_addr = seg.ds_addr;
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if (src1_len != 2 * PAGE_SIZE) {
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hw_desc->u.control.src_page_break = 1;
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nseg = -1;
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error = _bus_dmamap_load_phys(ioat->data_tag,
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desc->src2_dmamap, src2, PAGE_SIZE, 0, &seg, &nseg);
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if (error != 0) {
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ioat_log_message(0, "%s: _bus_dmamap_load_phys"
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" failed %d\n", __func__, error);
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return (NULL);
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}
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hw_desc->next_src_addr = seg.ds_addr;
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}
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dst1_len = (dst2 != dst1 + PAGE_SIZE) ? PAGE_SIZE : 2 * PAGE_SIZE;
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nseg = -1;
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error = _bus_dmamap_load_phys(ioat->data_tag,
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desc->dst_dmamap, dst1, dst1_len, 0, &seg, &nseg);
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if (error != 0) {
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ioat_log_message(0, "%s: _bus_dmamap_load_phys"
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" failed %d\n", __func__, error);
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return (NULL);
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}
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hw_desc->dest_addr = seg.ds_addr;
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if (dst1_len != 2 * PAGE_SIZE) {
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hw_desc->u.control.dest_page_break = 1;
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hw_desc->next_dest_addr = dst2;
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nseg = -1;
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error = _bus_dmamap_load_phys(ioat->data_tag,
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desc->dst2_dmamap, dst2, PAGE_SIZE, 0, &seg, &nseg);
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if (error != 0) {
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ioat_log_message(0, "%s: _bus_dmamap_load_phys"
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" failed %d\n", __func__, error);
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return (NULL);
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}
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hw_desc->next_dest_addr = seg.ds_addr;
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}
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if (g_ioat_debug_level >= 3)
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@ -1149,6 +1335,8 @@ ioat_copy_crc(bus_dmaengine_t dmaengine, bus_addr_t dst, bus_addr_t src,
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struct ioat_softc *ioat;
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uint32_t teststore;
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uint8_t op;
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bus_dma_segment_t seg;
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int nseg, error;
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ioat = to_ioat_softc(dmaengine);
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CTR2(KTR_IOAT, "%s channel=%u", __func__, ioat->chan_idx);
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@ -1201,9 +1389,18 @@ ioat_copy_crc(bus_dmaengine_t dmaengine, bus_addr_t dst, bus_addr_t src,
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hw_desc = &ioat_get_descriptor(ioat, desc->id)->crc32;
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if ((flags & DMA_CRC_INLINE) == 0)
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hw_desc->crc_address = crcptr;
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else
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if ((flags & DMA_CRC_INLINE) == 0) {
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nseg = -1;
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error = _bus_dmamap_load_phys(ioat->data_crc_tag,
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desc->crc_dmamap, crcptr, sizeof(uint32_t), 0,
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&seg, &nseg);
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if (error != 0) {
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ioat_log_message(0, "%s: _bus_dmamap_load_phys"
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" failed %d\n", __func__, error);
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return (NULL);
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}
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hw_desc->crc_address = seg.ds_addr;
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} else
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hw_desc->u.control.crc_location = 1;
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if (initialseed != NULL) {
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@ -1228,6 +1425,8 @@ ioat_crc(bus_dmaengine_t dmaengine, bus_addr_t src, bus_size_t len,
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struct ioat_softc *ioat;
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uint32_t teststore;
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uint8_t op;
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bus_dma_segment_t seg;
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int nseg, error;
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ioat = to_ioat_softc(dmaengine);
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CTR2(KTR_IOAT, "%s channel=%u", __func__, ioat->chan_idx);
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@ -1280,9 +1479,18 @@ ioat_crc(bus_dmaengine_t dmaengine, bus_addr_t src, bus_size_t len,
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hw_desc = &ioat_get_descriptor(ioat, desc->id)->crc32;
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if ((flags & DMA_CRC_INLINE) == 0)
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hw_desc->crc_address = crcptr;
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else
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if ((flags & DMA_CRC_INLINE) == 0) {
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nseg = -1;
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error = _bus_dmamap_load_phys(ioat->data_crc_tag,
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desc->crc_dmamap, crcptr, sizeof(uint32_t), 0,
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&seg, &nseg);
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if (error != 0) {
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ioat_log_message(0, "%s: _bus_dmamap_load_phys"
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" failed %d\n", __func__, error);
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return (NULL);
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}
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hw_desc->crc_address = seg.ds_addr;
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} else
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hw_desc->u.control.crc_location = 1;
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if (initialseed != NULL) {
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@ -1321,12 +1529,13 @@ ioat_blockfill(bus_dmaengine_t dmaengine, bus_addr_t dst, uint64_t fillpattern,
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return (NULL);
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}
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desc = ioat_op_generic(ioat, IOAT_OP_FILL, len, fillpattern, dst,
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desc = ioat_op_generic(ioat, IOAT_OP_FILL, len, 0, dst,
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callback_fn, callback_arg, flags);
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if (desc == NULL)
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return (NULL);
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hw_desc = &ioat_get_descriptor(ioat, desc->id)->fill;
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hw_desc->src_data = fillpattern;
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if (g_ioat_debug_level >= 3)
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dump_descriptor(hw_desc);
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@ -414,6 +414,11 @@ struct bus_dmadesc {
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struct ioat_descriptor {
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struct bus_dmadesc bus_dmadesc;
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uint32_t id;
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bus_dmamap_t src_dmamap;
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bus_dmamap_t dst_dmamap;
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bus_dmamap_t src2_dmamap;
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bus_dmamap_t dst2_dmamap;
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bus_dmamap_t crc_dmamap;
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};
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/* Unused by this driver at this time. */
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@ -457,6 +462,9 @@ struct ioat_softc {
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bus_dma_tag_t hw_desc_tag;
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bus_dmamap_t hw_desc_map;
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bus_dma_tag_t data_tag;
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bus_dma_tag_t data_crc_tag;
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bus_dma_tag_t comp_update_tag;
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bus_dmamap_t comp_update_map;
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uint64_t *comp_update;
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