Bugfixes and enhancements...
Don't enable the oscillator when it is found to be stopped at init time, just let the first setting of valid time start it. But still report a dead battery if it's stopped at init time. Don't force the chip into 24hr mode, just cope with whatever mode it is already in. Schedule the clock_settime() callbacks to align the RTC clock to top of second when setting it.
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81eea56b41
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@ -62,6 +62,7 @@ struct ds3231_softc {
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uint16_t sc_addr; /* DS3231 slave address. */
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uint8_t sc_ctrl;
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uint8_t sc_status;
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bool sc_use_ampm;
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};
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static void ds3231_start(void *);
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@ -140,25 +141,6 @@ ds3231_status_write(struct ds3231_softc *sc, int clear_a1, int clear_a2)
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return (error);
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}
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static int
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ds3231_set_24hrs_mode(struct ds3231_softc *sc)
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{
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int error;
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uint8_t hour;
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error = ds3231_read1(sc->sc_dev, DS3231_HOUR, &hour);
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if (error) {
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device_printf(sc->sc_dev, "cannot read from RTC.\n");
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return (error);
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}
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hour &= ~DS3231_C_MASK;
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error = ds3231_write1(sc->sc_dev, DS3231_HOUR, hour);
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if (error != 0)
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device_printf(sc->sc_dev, "cannot write to RTC.\n");
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return (error);
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}
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static int
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ds3231_temp_read(struct ds3231_softc *sc, int *temp)
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{
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@ -437,20 +419,20 @@ ds3231_start(void *xdev)
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return;
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if (ds3231_status_read(sc) != 0)
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return;
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/* Clear the OSF bit and ack any pending alarm interrupt. */
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/*
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* Warn if the clock stopped, but don't restart it until the first
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* clock_settime() call.
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*/
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if (sc->sc_status & DS3231_STATUS_OSF) {
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device_printf(sc->sc_dev,
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"oscillator has stopped, check the battery.\n");
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sc->sc_status &= ~DS3231_STATUS_OSF;
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"WARNING: RTC clock stopped, check the battery.\n");
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}
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/* Ack any pending alarm interrupt. */
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if (ds3231_status_write(sc, 1, 1) != 0)
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return;
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/* Always enable the oscillator. */
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if (ds3231_ctrl_write(sc) != 0)
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return;
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/* Set the 24 hours mode. */
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if (ds3231_set_24hrs_mode(sc) != 0)
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return;
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/* Temperature. */
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "temperature",
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@ -476,8 +458,13 @@ ds3231_start(void *xdev)
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CTLFLAG_RW | CTLTYPE_UINT | CTLFLAG_MPSAFE, sc, 0,
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ds3231_en32khz_sysctl, "IU", "DS3231 enable the 32kHz output");
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/* 1 second resolution. */
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clock_register(dev, 1000000);
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/*
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* Register as a clock with 1 second resolution. Schedule the
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* clock_settime() method to be called just after top-of-second;
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* resetting the time resets top-of-second in the hardware.
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*/
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clock_register_flags(dev, 1000000, CLOCKF_SETTIME_NO_ADJ);
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clock_schedule(dev, 1);
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}
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static int
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@ -486,24 +473,45 @@ ds3231_gettime(device_t dev, struct timespec *ts)
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int c, error;
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struct clocktime ct;
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struct ds3231_softc *sc;
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uint8_t data[7];
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uint8_t data[7], hourmask;
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sc = device_get_softc(dev);
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memset(data, 0, sizeof(data));
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/* If the clock halted, we don't have good data. */
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if ((error = ds3231_status_read(sc)) != 0) {
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device_printf(dev, "cannot read from RTC.\n");
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return (error);
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}
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if (sc->sc_status & DS3231_STATUS_OSF)
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return (EINVAL);
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error = iicdev_readfrom(sc->sc_dev, DS3231_SECS, data, sizeof(data),
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IIC_INTRWAIT);
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if (error != 0) {
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device_printf(dev, "cannot read from RTC.\n");
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return (error);
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}
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/* If chip is in AM/PM mode remember that. */
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if (data[DS3231_HOUR] & DS3231_HOUR_USE_AMPM) {
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sc->sc_use_ampm = true;
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hourmask = DS3231_HOUR_MASK_12HR;
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} else
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hourmask = DS3231_HOUR_MASK_24HR;
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ct.nsec = 0;
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ct.sec = FROMBCD(data[DS3231_SECS] & DS3231_SECS_MASK);
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ct.min = FROMBCD(data[DS3231_MINS] & DS3231_MINS_MASK);
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ct.hour = FROMBCD(data[DS3231_HOUR] & DS3231_HOUR_MASK);
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ct.day = FROMBCD(data[DS3231_DATE] & DS3231_DATE_MASK);
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ct.dow = data[DS3231_WEEKDAY] & DS3231_WEEKDAY_MASK;
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ct.mon = FROMBCD(data[DS3231_MONTH] & DS3231_MONTH_MASK);
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ct.year = FROMBCD(data[DS3231_YEAR] & DS3231_YEAR_MASK);
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ct.sec = FROMBCD(data[DS3231_SECS] & DS3231_SECS_MASK);
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ct.min = FROMBCD(data[DS3231_MINS] & DS3231_MINS_MASK);
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ct.hour = FROMBCD(data[DS3231_HOUR] & hourmask);
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ct.day = FROMBCD(data[DS3231_DATE] & DS3231_DATE_MASK);
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ct.mon = FROMBCD(data[DS3231_MONTH] & DS3231_MONTH_MASK);
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ct.year = FROMBCD(data[DS3231_YEAR] & DS3231_YEAR_MASK);
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/*
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* If the century flag has toggled since we last saw it, there has been
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* a century rollover. If this is the first time we're seeing it,
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* remember the state so we can preserve its polarity on writes.
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*/
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c = (data[DS3231_MONTH] & DS3231_C_MASK) ? 1 : 0;
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if (sc->sc_last_c == -1)
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sc->sc_last_c = c;
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@ -515,6 +523,14 @@ ds3231_gettime(device_t dev, struct timespec *ts)
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if (ct.year < POSIX_BASE_YEAR)
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ct.year += 100; /* assume [1970, 2069] */
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/* If running in AM/PM mode, deal with it. */
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if (sc->sc_use_ampm) {
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if (ct.hour == 12)
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ct.hour = 0;
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if (data[DS3231_HOUR] & DS3231_HOUR_IS_PM)
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ct.hour += 12;
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}
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return (clock_ct_to_ts(&ct, ts));
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}
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@ -525,28 +541,62 @@ ds3231_settime(device_t dev, struct timespec *ts)
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struct clocktime ct;
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struct ds3231_softc *sc;
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uint8_t data[7];
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uint8_t pmflags;
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sc = device_get_softc(dev);
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/* Accuracy is only one second. */
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if (ts->tv_nsec >= 500000000)
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ts->tv_sec++;
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ts->tv_nsec = 0;
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/*
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* We request a timespec with no resolution-adjustment. That also
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* disables utc adjustment, so apply that ourselves.
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*/
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ts->tv_sec -= utc_offset();
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clock_ts_to_ct(ts, &ct);
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memset(data, 0, sizeof(data));
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data[DS3231_SECS] = TOBCD(ct.sec);
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data[DS3231_MINS] = TOBCD(ct.min);
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data[DS3231_HOUR] = TOBCD(ct.hour);
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data[DS3231_DATE] = TOBCD(ct.day);
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/* If the chip is in AM/PM mode, adjust hour and set flags as needed. */
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if (sc->sc_use_ampm) {
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pmflags = DS3231_HOUR_USE_AMPM;
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if (ct.hour >= 12) {
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ct.hour -= 12;
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pmflags |= DS3231_HOUR_IS_PM;
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}
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if (ct.hour == 0)
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ct.hour = 12;
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} else
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pmflags = 0;
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data[DS3231_SECS] = TOBCD(ct.sec);
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data[DS3231_MINS] = TOBCD(ct.min);
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data[DS3231_HOUR] = TOBCD(ct.hour) | pmflags;
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data[DS3231_DATE] = TOBCD(ct.day);
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data[DS3231_WEEKDAY] = ct.dow;
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data[DS3231_MONTH] = TOBCD(ct.mon);
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data[DS3231_YEAR] = TOBCD(ct.year % 100);
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data[DS3231_MONTH] = TOBCD(ct.mon);
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data[DS3231_YEAR] = TOBCD(ct.year % 100);
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if (sc->sc_last_c)
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data[DS3231_MONTH] |= DS3231_C_MASK;
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/* Write the time back to RTC. */
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error = iicdev_writeto(dev, DS3231_SECS, data, sizeof(data),
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IIC_INTRWAIT);
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if (error != 0)
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if (error != 0) {
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device_printf(dev, "cannot write to RTC.\n");
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return (error);
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}
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/*
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* Unlike most hardware, the osc-was-stopped bit does not clear itself
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* after setting the time, it has to be manually written to zero.
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*/
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if (sc->sc_status & DS3231_STATUS_OSF) {
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if ((error = ds3231_status_read(sc)) != 0) {
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device_printf(dev, "cannot read from RTC.\n");
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return (error);
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}
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sc->sc_status &= ~DS3231_STATUS_OSF;
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if ((error = ds3231_status_write(sc, 0, 0)) != 0) {
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device_printf(dev, "cannot write to RTC.\n");
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return (error);
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}
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}
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return (error);
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}
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@ -38,7 +38,10 @@
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#define DS3231_MINS 0x01
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#define DS3231_MINS_MASK 0x7f
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#define DS3231_HOUR 0x02
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#define DS3231_HOUR_MASK 0x3f
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#define DS3231_HOUR_MASK_12HR 0x3f
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#define DS3231_HOUR_MASK_24HR 0x1f
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#define DS3231_HOUR_IS_PM 0x20
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#define DS3231_HOUR_USE_AMPM 0x40
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#define DS3231_WEEKDAY 0x03
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#define DS3231_WEEKDAY_MASK 0x07
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#define DS3231_DATE 0x04
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