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Unify OF PCI infrastructure, including changing from parsing the device

Browse Source 
tree based on heuristics to parsing it based on the spec. This should also
lay the foundation for NEW_PCIB on PowerPC.

MFC after:	3 months
This commit is contained in:
nwhitehorn 2012-02-04 19:54:13 +00:00
parent 8c3a18753f
commit 704bf01027
7 changed files with 602 additions and 926 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

501
sys/powerpc/ofw/ofw_pci.c Normal file
View File

@ -0,0 +1,501 @@
/*-
* Copyright (c) 2011 Nathan Whitehorn
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <sys/conf.h>
#include <sys/kernel.h>
#include <dev/ofw/openfirm.h>
#include <dev/ofw/ofw_pci.h>
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
#include <machine/bus.h>
#include <machine/intr_machdep.h>
#include <machine/md_var.h>
#include <machine/pio.h>
#include <machine/resource.h>
#include <sys/rman.h>
#include <vm/vm.h>
#include <vm/pmap.h>
#include <powerpc/ofw/ofw_pci.h>
#include "pcib_if.h"
/*
* Bus interface.
*/
static int ofw_pci_read_ivar(device_t, device_t, int,
uintptr_t *);
static struct resource * ofw_pci_alloc_resource(device_t bus,
device_t child, int type, int *rid, u_long start,
u_long end, u_long count, u_int flags);
static int ofw_pci_release_resource(device_t bus, device_t child,
int type, int rid, struct resource *res);
static int ofw_pci_activate_resource(device_t bus, device_t child,
int type, int rid, struct resource *res);
static int ofw_pci_deactivate_resource(device_t bus,
device_t child, int type, int rid,
struct resource *res);
/*
* pcib interface.
*/
static int ofw_pci_maxslots(device_t);
static int ofw_pci_route_interrupt(device_t, device_t, int);
/*
* ofw_bus interface
*/
static phandle_t ofw_pci_get_node(device_t bus, device_t dev);
/*
* local methods
*/
static int ofw_pci_nranges(phandle_t node);
static int ofw_pci_fill_ranges(phandle_t node, struct ofw_pci_range *ranges);
/*
* Driver methods.
*/
static device_method_t ofw_pci_methods[] = {
/* Device interface */
DEVMETHOD(device_attach, ofw_pci_attach),
/* Bus interface */
DEVMETHOD(bus_print_child, bus_generic_print_child),
DEVMETHOD(bus_read_ivar, ofw_pci_read_ivar),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
DEVMETHOD(bus_alloc_resource, ofw_pci_alloc_resource),
DEVMETHOD(bus_release_resource, ofw_pci_release_resource),
DEVMETHOD(bus_activate_resource, ofw_pci_activate_resource),
DEVMETHOD(bus_deactivate_resource, ofw_pci_deactivate_resource),
/* pcib interface */
DEVMETHOD(pcib_maxslots, ofw_pci_maxslots),
DEVMETHOD(pcib_route_interrupt, ofw_pci_route_interrupt),
/* ofw_bus interface */
DEVMETHOD(ofw_bus_get_node, ofw_pci_get_node),
DEVMETHOD_END
};
DEFINE_CLASS_0(ofw_pci, ofw_pci_driver, ofw_pci_methods, 0);
int
ofw_pci_attach(device_t dev)
{
struct ofw_pci_softc *sc;
phandle_t node;
u_int32_t busrange[2];
struct ofw_pci_range *rp;
int error;
node = ofw_bus_get_node(dev);
sc = device_get_softc(dev);
if (OF_getprop(node, "reg", &sc->sc_pcir, sizeof(sc->sc_pcir)) == -1)
return (ENXIO);
if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8)
busrange[0] = 0;
sc->sc_dev = dev;
sc->sc_node = node;
sc->sc_bus = busrange[0];
if (sc->sc_quirks & OFW_PCI_QUIRK_RANGES_ON_CHILDREN) {
phandle_t c;
int n, i;
sc->sc_nrange = 0;
for (c = OF_child(node); c != 0; c = OF_peer(c)) {
n = ofw_pci_nranges(c);
if (n > 0)
sc->sc_nrange += n;
}
if (sc->sc_nrange == 0)
return (ENXIO);
sc->sc_range = malloc(sc->sc_nrange * sizeof(sc->sc_range[0]),
M_DEVBUF, M_WAITOK);
i = 0;
for (c = OF_child(node); c != 0; c = OF_peer(c)) {
n = ofw_pci_fill_ranges(c, &sc->sc_range[i]);
if (n > 0)
i += n;
}
KASSERT(i == sc->sc_nrange, ("range count mismatch"));
} else {
sc->sc_nrange = ofw_pci_nranges(node);
if (sc->sc_nrange <= 0) {
device_printf(dev, "could not get ranges\n");
return (ENXIO);
}
sc->sc_range = malloc(sc->sc_nrange * sizeof(sc->sc_range[0]),
M_DEVBUF, M_WAITOK);
ofw_pci_fill_ranges(node, sc->sc_range);
}
sc->sc_io_rman.rm_type = RMAN_ARRAY;
sc->sc_io_rman.rm_descr = "PCI I/O Ports";
error = rman_init(&sc->sc_io_rman);
if (error) {
device_printf(dev, "rman_init() failed. error = %d\n", error);
return (error);
}
sc->sc_mem_rman.rm_type = RMAN_ARRAY;
sc->sc_mem_rman.rm_descr = "PCI Memory";
error = rman_init(&sc->sc_mem_rman);
if (error) {
device_printf(dev, "rman_init() failed. error = %d\n", error);
return (error);
}
for (rp = sc->sc_range; rp < sc->sc_range + sc->sc_nrange &&
rp->pci_hi != 0; rp++) {
error = 0;
switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
case OFW_PCI_PHYS_HI_SPACE_CONFIG:
break;
case OFW_PCI_PHYS_HI_SPACE_IO:
error = rman_manage_region(&sc->sc_io_rman, rp->pci,
rp->pci + rp->size - 1);
break;
case OFW_PCI_PHYS_HI_SPACE_MEM32:
case OFW_PCI_PHYS_HI_SPACE_MEM64:
error = rman_manage_region(&sc->sc_mem_rman, rp->pci,
rp->pci + rp->size - 1);
break;
}
if (error) {
device_printf(dev,
"rman_manage_region(%x, %#jx, %#jx) failed. "
"error = %d\n", rp->pci_hi &
OFW_PCI_PHYS_HI_SPACEMASK, rp->pci,
rp->pci + rp->size - 1, error);
panic("AHOY");
return (error);
}
}
ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(cell_t));
device_add_child(dev, "pci", device_get_unit(dev));
return (bus_generic_attach(dev));
}
static int
ofw_pci_maxslots(device_t dev)
{
return (PCI_SLOTMAX);
}
static int
ofw_pci_route_interrupt(device_t bus, device_t dev, int pin)
{
struct ofw_pci_softc *sc;
struct ofw_pci_register reg;
uint32_t pintr, mintr;
phandle_t iparent;
uint8_t maskbuf[sizeof(reg) + sizeof(pintr)];
sc = device_get_softc(bus);
pintr = pin;
if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), &sc->sc_pci_iinfo, &reg,
sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr),
&iparent, maskbuf))
return (MAP_IRQ(iparent, mintr));
/* Maybe it's a real interrupt, not an intpin */
if (pin > 4)
return (pin);
device_printf(bus, "could not route pin %d for device %d.%d\n",
pin, pci_get_slot(dev), pci_get_function(dev));
return (PCI_INVALID_IRQ);
}
static int
ofw_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
{
struct ofw_pci_softc *sc;
sc = device_get_softc(dev);
switch (which) {
case PCIB_IVAR_DOMAIN:
*result = device_get_unit(dev);
return (0);
case PCIB_IVAR_BUS:
*result = sc->sc_bus;
return (0);
}
return (ENOENT);
}
static struct resource *
ofw_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
u_long start, u_long end, u_long count, u_int flags)
{
struct ofw_pci_softc *sc;
struct resource *rv;
struct rman *rm;
int needactivate;
needactivate = flags & RF_ACTIVE;
flags &= ~RF_ACTIVE;
sc = device_get_softc(bus);
switch (type) {
case SYS_RES_MEMORY:
rm = &sc->sc_mem_rman;
break;
case SYS_RES_IOPORT:
rm = &sc->sc_io_rman;
break;
case SYS_RES_IRQ:
return (bus_alloc_resource(bus, type, rid, start, end, count,
flags));
default:
device_printf(bus, "unknown resource request from %s\n",
device_get_nameunit(child));
return (NULL);
}
rv = rman_reserve_resource(rm, start, end, count, flags, child);
if (rv == NULL) {
device_printf(bus, "failed to reserve resource for %s\n",
device_get_nameunit(child));
return (NULL);
}
rman_set_rid(rv, *rid);
if (needactivate) {
if (bus_activate_resource(child, type, *rid, rv) != 0) {
device_printf(bus,
"failed to activate resource for %s\n",
device_get_nameunit(child));
rman_release_resource(rv);
return (NULL);
}
}
return (rv);
}
static int
ofw_pci_release_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
{
if (rman_get_flags(res) & RF_ACTIVE) {
int error = bus_deactivate_resource(child, type, rid, res);
if (error)
return error;
}
return (rman_release_resource(res));
}
static int
ofw_pci_activate_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
{
struct ofw_pci_softc *sc;
void *p;
sc = device_get_softc(bus);
if (type == SYS_RES_IRQ) {
return (bus_activate_resource(bus, type, rid, res));
}
if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
struct ofw_pci_range *rp;
vm_offset_t start;
int space;
start = (vm_offset_t)rman_get_start(res);
/*
* Map this through the ranges list
*/
for (rp = sc->sc_range; rp < sc->sc_range + sc->sc_nrange &&
rp->pci_hi != 0; rp++) {
if (start < rp->pci || start >= rp->pci + rp->size)
continue;
switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
case OFW_PCI_PHYS_HI_SPACE_IO:
space = SYS_RES_IOPORT;
break;
case OFW_PCI_PHYS_HI_SPACE_MEM32:
case OFW_PCI_PHYS_HI_SPACE_MEM64:
space = SYS_RES_MEMORY;
break;
default:
space = -1;
}
if (type == space) {
start += (rp->host - rp->pci);
break;
}
}
if (bootverbose)
printf("ofw_pci mapdev: start %zx, len %ld\n", start,
rman_get_size(res));
p = pmap_mapdev(start, (vm_size_t)rman_get_size(res));
if (p == NULL)
return (ENOMEM);
rman_set_virtual(res, p);
rman_set_bustag(res, &bs_le_tag);
rman_set_bushandle(res, (u_long)p);
}
return (rman_activate_resource(res));
}
static int
ofw_pci_deactivate_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
{
/*
* If this is a memory resource, unmap it.
*/
if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) {
u_int32_t psize;
psize = rman_get_size(res);
pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize);
}
return (rman_deactivate_resource(res));
}
static phandle_t
ofw_pci_get_node(device_t bus, device_t dev)
{
struct ofw_pci_softc *sc;
sc = device_get_softc(bus);
/* We only have one child, the PCI bus, which needs our own node. */
return (sc->sc_node);
}
static int
ofw_pci_nranges(phandle_t node)
{
int host_address_cells = 1, pci_address_cells = 3, size_cells = 2;
ssize_t nbase_ranges;
OF_getprop(OF_parent(node), "#address-cells", &host_address_cells,
sizeof(host_address_cells));
OF_getprop(node, "#address-cells", &pci_address_cells,
sizeof(pci_address_cells));
OF_getprop(node, "#size-cells", &size_cells, sizeof(size_cells));
nbase_ranges = OF_getproplen(node, "ranges");
if (nbase_ranges <= 0)
return (-1);
return (nbase_ranges / sizeof(cell_t) /
(pci_address_cells + host_address_cells + size_cells));
}
static int
ofw_pci_fill_ranges(phandle_t node, struct ofw_pci_range *ranges)
{
int host_address_cells = 1, pci_address_cells = 3, size_cells = 2;
cell_t *base_ranges;
ssize_t nbase_ranges;
int nranges;
int i, j, k;
OF_getprop(OF_parent(node), "#address-cells", &host_address_cells,
sizeof(host_address_cells));
OF_getprop(node, "#address-cells", &pci_address_cells,
sizeof(pci_address_cells));
OF_getprop(node, "#size-cells", &size_cells, sizeof(size_cells));
nbase_ranges = OF_getproplen(node, "ranges");
if (nbase_ranges <= 0)
return (-1);
nranges = nbase_ranges / sizeof(cell_t) /
(pci_address_cells + host_address_cells + size_cells);
base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
OF_getprop(node, "ranges", base_ranges, nbase_ranges);
for (i = 0, j = 0; i < nranges; i++) {
ranges[i].pci_hi = base_ranges[j++];
ranges[i].pci = 0;
for (k = 0; k < pci_address_cells - 1; k++) {
ranges[i].pci <<= 32;
ranges[i].pci |= base_ranges[j++];
}
ranges[i].host = 0;
for (k = 0; k < host_address_cells; k++) {
ranges[i].host <<= 32;
ranges[i].host |= base_ranges[j++];
}
ranges[i].size = 0;
for (k = 0; k < size_cells; k++) {
ranges[i].size <<= 32;
ranges[i].size |= base_ranges[j++];
}
}
free(base_ranges, M_DEVBUF);
return (nranges);
}

74
sys/powerpc/ofw/ofw_pci.h Normal file
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@ -0,0 +1,74 @@
/*-
* Copyright (c) 2011 Nathan Whitehorn
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef POWERPC_OFW_OFW_PCI_H
#define POWERPC_OFW_OFW_PCI_H
/*
* Export class definition for inheritance purposes
*/
DECLARE_CLASS(ofw_pci_driver);
struct ofw_pci_range {
uint32_t pci_hi;
uint64_t pci;
uint64_t host;
uint64_t size;
};
/*
* Quirks for some adapters
*/
enum {
OFW_PCI_QUIRK_RANGES_ON_CHILDREN = 1,
};
struct ofw_pci_softc {
device_t sc_dev;
phandle_t sc_node;
int sc_bus;
int sc_quirks;
struct ofw_pci_register sc_pcir;
struct ofw_pci_range *sc_range;
int sc_nrange;
struct rman sc_io_rman;
struct rman sc_mem_rman;
bus_space_tag_t sc_memt;
bus_dma_tag_t sc_dmat;
struct ofw_bus_iinfo sc_pci_iinfo;
};
int ofw_pci_attach(device_t dev);
#endif // POWERPC_OFW_OFW_PCI_H

275
sys/powerpc/powermac/cpcht.c
View File

@ -50,6 +50,7 @@ __FBSDID("$FreeBSD$");
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
#include <powerpc/ofw/ofw_pci.h>
#include <vm/vm.h>
#include <vm/pmap.h>
@ -65,31 +66,14 @@ static int cpcht_attach(device_t);
static void cpcht_configure_htbridge(device_t, phandle_t);
/*
* Bus interface.
*/
static int cpcht_read_ivar(device_t, device_t, int,
uintptr_t *);
static struct resource *cpcht_alloc_resource(device_t bus, device_t child,
int type, int *rid, u_long start, u_long end,
u_long count, u_int flags);
static int cpcht_activate_resource(device_t bus, device_t child,
int type, int rid, struct resource *res);
static int cpcht_release_resource(device_t bus, device_t child,
int type, int rid, struct resource *res);
static int cpcht_deactivate_resource(device_t bus, device_t child,
int type, int rid, struct resource *res);
/*
* pcib interface.
*/
static int cpcht_maxslots(device_t);
static u_int32_t cpcht_read_config(device_t, u_int, u_int, u_int,
u_int, int);
static void cpcht_write_config(device_t, u_int, u_int, u_int,
u_int, u_int32_t, int);
static int cpcht_route_interrupt(device_t bus, device_t dev,
int pin);
static int cpcht_route_interrupt(device_t, device_t, int);
static int cpcht_alloc_msi(device_t dev, device_t child,
int count, int maxcount, int *irqs);
static int cpcht_release_msi(device_t dev, device_t child,
@ -101,12 +85,6 @@ static int cpcht_release_msix(device_t dev, device_t child,
static int cpcht_map_msi(device_t dev, device_t child,
int irq, uint64_t *addr, uint32_t *data);
/*
* ofw_bus interface
*/
static phandle_t cpcht_get_node(device_t bus, device_t child);
/*
* Driver methods.
*/
@ -115,17 +93,7 @@ static device_method_t cpcht_methods[] = {
DEVMETHOD(device_probe, cpcht_probe),
DEVMETHOD(device_attach, cpcht_attach),
/* Bus interface */
DEVMETHOD(bus_read_ivar, cpcht_read_ivar),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
DEVMETHOD(bus_alloc_resource, cpcht_alloc_resource),
DEVMETHOD(bus_release_resource, cpcht_release_resource),
DEVMETHOD(bus_activate_resource, cpcht_activate_resource),
DEVMETHOD(bus_deactivate_resource, cpcht_deactivate_resource),
/* pcib interface */
DEVMETHOD(pcib_maxslots, cpcht_maxslots),
DEVMETHOD(pcib_read_config, cpcht_read_config),
DEVMETHOD(pcib_write_config, cpcht_write_config),
DEVMETHOD(pcib_route_interrupt, cpcht_route_interrupt),
@ -135,9 +103,6 @@ static device_method_t cpcht_methods[] = {
DEVMETHOD(pcib_release_msix, cpcht_release_msix),
DEVMETHOD(pcib_map_msi, cpcht_map_msi),
/* ofw_bus interface */
DEVMETHOD(ofw_bus_get_node, cpcht_get_node),
DEVMETHOD_END
};
@ -158,25 +123,17 @@ static struct cpcht_irq *cpcht_irqmap = NULL;
uint32_t cpcht_msipic = 0;
struct cpcht_softc {
device_t sc_dev;
phandle_t sc_node;
struct ofw_pci_softc pci_sc;
vm_offset_t sc_data;
uint64_t sc_populated_slots;
struct rman sc_mem_rman;
struct rman sc_io_rman;
struct cpcht_irq htirq_map[128];
struct mtx htirq_mtx;
};
static driver_t cpcht_driver = {
"pcib",
cpcht_methods,
sizeof(struct cpcht_softc)
};
static devclass_t cpcht_devclass;
DEFINE_CLASS_1(pcib, cpcht_driver, cpcht_methods, sizeof(struct cpcht_softc),
ofw_pci_driver);
DRIVER_MODULE(cpcht, nexus, cpcht_driver, cpcht_devclass, 0, 0);
#define CPCHT_IOPORT_BASE 0xf4000000UL /* Hardwired */
@ -186,17 +143,6 @@ DRIVER_MODULE(cpcht, nexus, cpcht_driver, cpcht_devclass, 0, 0);
#define HTAPIC_TRIGGER_LEVEL 0x02
#define HTAPIC_MASK 0x01
struct cpcht_range {
u_int32_t pci_hi;
u_int32_t pci_mid;
u_int32_t pci_lo;
u_int32_t junk;
u_int32_t host_hi;
u_int32_t host_lo;
u_int32_t size_hi;
u_int32_t size_lo;
};
static int
cpcht_probe(device_t dev)
{
@ -214,7 +160,6 @@ cpcht_probe(device_t dev)
if (strcmp(compatible, "u3-ht") != 0)
return (ENXIO);
device_set_desc(dev, "IBM CPC9X5 HyperTransport Tunnel");
return (0);
}
@ -225,7 +170,7 @@ cpcht_attach(device_t dev)
struct cpcht_softc *sc;
phandle_t node, child;
u_int32_t reg[3];
int i, error;
int i;
node = ofw_bus_get_node(dev);
sc = device_get_softc(dev);
@ -233,35 +178,20 @@ cpcht_attach(device_t dev)
if (OF_getprop(node, "reg", reg, sizeof(reg)) < 12)
return (ENXIO);
sc->sc_dev = dev;
sc->sc_node = node;
sc->pci_sc.sc_quirks = OFW_PCI_QUIRK_RANGES_ON_CHILDREN;
sc->sc_populated_slots = 0;
sc->sc_data = (vm_offset_t)pmap_mapdev(reg[1], reg[2]);
sc->sc_mem_rman.rm_type = RMAN_ARRAY;
sc->sc_mem_rman.rm_descr = "CPCHT Device Memory";
error = rman_init(&sc->sc_mem_rman);
if (error) {
device_printf(dev, "rman_init() failed. error = %d\n", error);
return (error);
}
sc->sc_io_rman.rm_type = RMAN_ARRAY;
sc->sc_io_rman.rm_descr = "CPCHT I/O Memory";
error = rman_init(&sc->sc_io_rman);
if (error) {
device_printf(dev, "rman_init() failed. error = %d\n", error);
return (error);
}
/*
* Set up the resource manager and the HT->MPIC mapping. For cpcht,
* the ranges are properties of the child bridges, and this is also
* where we get the HT interrupts properties.
*/
#if 0
/* I/O port mappings are usually not in the device tree */
rman_manage_region(&sc->sc_io_rman, 0, CPCHT_IOPORT_SIZE - 1);
rman_manage_region(&sc->pci_sc.sc_io_rman, 0, CPCHT_IOPORT_SIZE - 1);
#endif
bzero(sc->htirq_map, sizeof(sc->htirq_map));
mtx_init(&sc->htirq_mtx, "cpcht irq", NULL, MTX_DEF);
@ -273,9 +203,7 @@ cpcht_attach(device_t dev)
/* Now make the mapping table available to the MPIC */
cpcht_irqmap = sc->htirq_map;
device_add_child(dev, "pci", device_get_unit(dev));
return (bus_generic_attach(dev));
return (ofw_pci_attach(dev));
}
static void
@ -283,8 +211,7 @@ cpcht_configure_htbridge(device_t dev, phandle_t child)
{
struct cpcht_softc *sc;
struct ofw_pci_register pcir;
struct cpcht_range ranges[7], *rp;
int nranges, ptr, nextptr;
int ptr, nextptr;
uint32_t vend, val;
int i, nirq, irq;
u_int f, s;
@ -302,32 +229,6 @@ cpcht_configure_htbridge(device_t dev, phandle_t child)
*/
sc->sc_populated_slots |= (1 << s);
/*
* Next grab this child bus's bus ranges.
*/
bzero(ranges, sizeof(ranges));
nranges = OF_getprop(child, "ranges", ranges, sizeof(ranges));
nranges /= sizeof(ranges[0]);
ranges[6].pci_hi = 0;
for (rp = ranges; rp < ranges + nranges && rp->pci_hi != 0; rp++) {
switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
case OFW_PCI_PHYS_HI_SPACE_CONFIG:
break;
case OFW_PCI_PHYS_HI_SPACE_IO:
rman_manage_region(&sc->sc_io_rman, rp->pci_lo,
rp->pci_lo + rp->size_lo - 1);
break;
case OFW_PCI_PHYS_HI_SPACE_MEM32:
rman_manage_region(&sc->sc_mem_rman, rp->pci_lo,
rp->pci_lo + rp->size_lo - 1);
break;
case OFW_PCI_PHYS_HI_SPACE_MEM64:
panic("64-bit CPCHT reserved memory!");
break;
}
}
/*
* Next build up any HT->MPIC mappings for this sub-bus. One would
* naively hope that enabling, disabling, and EOIing interrupts would
@ -404,13 +305,6 @@ cpcht_configure_htbridge(device_t dev, phandle_t child)
}
}
static int
cpcht_maxslots(device_t dev)
{
return (PCI_SLOTMAX);
}
static u_int32_t
cpcht_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
int width)
@ -473,157 +367,12 @@ cpcht_write_config(device_t dev, u_int bus, u_int slot, u_int func,
}
}
static int
cpcht_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
{
switch (which) {
case PCIB_IVAR_DOMAIN:
*result = device_get_unit(dev);
return (0);
case PCIB_IVAR_BUS:
*result = 0; /* Root bus */
return (0);
}
return (ENOENT);
}
static phandle_t
cpcht_get_node(device_t bus, device_t dev)
{
struct cpcht_softc *sc;
sc = device_get_softc(bus);
/* We only have one child, the PCI bus, which needs our own node. */
return (sc->sc_node);
}
static int
cpcht_route_interrupt(device_t bus, device_t dev, int pin)
{
return (pin);
}
static struct resource *
cpcht_alloc_resource(device_t bus, device_t child, int type, int *rid,
u_long start, u_long end, u_long count, u_int flags)
{
struct cpcht_softc *sc;
struct resource *rv;
struct rman *rm;
int needactivate;
needactivate = flags & RF_ACTIVE;
flags &= ~RF_ACTIVE;
sc = device_get_softc(bus);
switch (type) {
case SYS_RES_IOPORT:
end = min(end, start + count);
rm = &sc->sc_io_rman;
break;
case SYS_RES_MEMORY:
rm = &sc->sc_mem_rman;
break;
case SYS_RES_IRQ:
return (bus_alloc_resource(bus, type, rid, start, end, count,
flags));
default:
device_printf(bus, "unknown resource request from %s\n",
device_get_nameunit(child));
return (NULL);
}
rv = rman_reserve_resource(rm, start, end, count, flags, child);
if (rv == NULL) {
device_printf(bus, "failed to reserve resource for %s\n",
device_get_nameunit(child));
return (NULL);
}
rman_set_rid(rv, *rid);
if (needactivate) {
if (bus_activate_resource(child, type, *rid, rv) != 0) {
device_printf(bus,
"failed to activate resource for %s\n",
device_get_nameunit(child));
rman_release_resource(rv);
return (NULL);
}
}
return (rv);
}
static int
cpcht_activate_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
{
void *p;
if (type == SYS_RES_IRQ)
return (bus_activate_resource(bus, type, rid, res));
if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
vm_offset_t start;
start = (vm_offset_t)rman_get_start(res);
if (type == SYS_RES_IOPORT)
start += CPCHT_IOPORT_BASE;
if (bootverbose)
printf("cpcht mapdev: start %zx, len %ld\n", start,
rman_get_size(res));
p = pmap_mapdev(start, (vm_size_t)rman_get_size(res));
if (p == NULL)
return (ENOMEM);
rman_set_virtual(res, p);
rman_set_bustag(res, &bs_le_tag);
rman_set_bushandle(res, (u_long)p);
}
return (rman_activate_resource(res));
}
static int
cpcht_release_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
{
if (rman_get_flags(res) & RF_ACTIVE) {
int error = bus_deactivate_resource(child, type, rid, res);
if (error)
return error;
}
return (rman_release_resource(res));
}
static int
cpcht_deactivate_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
{
/*
* If this is a memory resource, unmap it.
*/
if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) {
u_int32_t psize;
psize = rman_get_size(res);
pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize);
}
return (rman_deactivate_resource(res));
}
static int
cpcht_alloc_msi(device_t dev, device_t child, int count, int maxcount,
int *irqs)

318
sys/powerpc/powermac/grackle.c
View File

@ -51,6 +51,7 @@ __FBSDID("$FreeBSD$");
#include <sys/rman.h>
#include <powerpc/ofw/ofw_pci.h>
#include <powerpc/powermac/gracklevar.h>
#include <vm/vm.h>
@ -66,37 +67,13 @@ int badaddr(void *, size_t); /* XXX */
static int grackle_probe(device_t);
static int grackle_attach(device_t);
/*
* Bus interface.
*/
static int grackle_read_ivar(device_t, device_t, int,
uintptr_t *);
static struct resource * grackle_alloc_resource(device_t bus,
device_t child, int type, int *rid, u_long start,
u_long end, u_long count, u_int flags);
static int grackle_release_resource(device_t bus, device_t child,
int type, int rid, struct resource *res);
static int grackle_activate_resource(device_t bus, device_t child,
int type, int rid, struct resource *res);
static int grackle_deactivate_resource(device_t bus,
device_t child, int type, int rid,
struct resource *res);
/*
* pcib interface.
*/
static int grackle_maxslots(device_t);
static u_int32_t grackle_read_config(device_t, u_int, u_int, u_int,
u_int, int);
static void grackle_write_config(device_t, u_int, u_int, u_int,
u_int, u_int32_t, int);
static int grackle_route_interrupt(device_t, device_t, int);
/*
* ofw_bus interface
*/
static phandle_t grackle_get_node(device_t bus, device_t dev);
/*
* Local routines.
@ -113,35 +90,16 @@ static device_method_t grackle_methods[] = {
DEVMETHOD(device_probe, grackle_probe),
DEVMETHOD(device_attach, grackle_attach),
/* Bus interface */
DEVMETHOD(bus_read_ivar, grackle_read_ivar),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
DEVMETHOD(bus_alloc_resource, grackle_alloc_resource),
DEVMETHOD(bus_release_resource, grackle_release_resource),
DEVMETHOD(bus_activate_resource, grackle_activate_resource),
DEVMETHOD(bus_deactivate_resource, grackle_deactivate_resource),
/* pcib interface */
DEVMETHOD(pcib_maxslots, grackle_maxslots),
DEVMETHOD(pcib_read_config, grackle_read_config),
DEVMETHOD(pcib_write_config, grackle_write_config),
DEVMETHOD(pcib_route_interrupt, grackle_route_interrupt),
/* ofw_bus interface */
DEVMETHOD(ofw_bus_get_node, grackle_get_node),
DEVMETHOD_END
};
static driver_t grackle_driver = {
"pcib",
grackle_methods,
sizeof(struct grackle_softc)
};
static devclass_t grackle_devclass;
DEFINE_CLASS_1(pci, grackle_driver, grackle_methods,
sizeof(struct grackle_softc), ofw_pci_driver);
DRIVER_MODULE(grackle, nexus, grackle_driver, grackle_devclass, 0, 0);
static int
@ -166,21 +124,9 @@ static int
grackle_attach(device_t dev)
{
struct grackle_softc *sc;
phandle_t node;
u_int32_t busrange[2];
struct grackle_range *rp, *io, *mem[2];
int nmem, i, error;
node = ofw_bus_get_node(dev);
sc = device_get_softc(dev);
if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8)
return (ENXIO);
sc->sc_dev = dev;
sc->sc_node = node;
sc->sc_bus = busrange[0];
/*
* The Grackle PCI config addr/data registers are actually in
* PCI space, but since they are needed to actually probe the
@ -190,83 +136,7 @@ grackle_attach(device_t dev)
sc->sc_addr = (vm_offset_t)pmap_mapdev(GRACKLE_ADDR, PAGE_SIZE);
sc->sc_data = (vm_offset_t)pmap_mapdev(GRACKLE_DATA, PAGE_SIZE);
bzero(sc->sc_range, sizeof(sc->sc_range));
sc->sc_nrange = OF_getprop(node, "ranges", sc->sc_range,
sizeof(sc->sc_range));
if (sc->sc_nrange == -1) {
device_printf(dev, "could not get ranges\n");
return (ENXIO);
}
sc->sc_nrange /= sizeof(sc->sc_range[0]);
sc->sc_range[6].pci_hi = 0;
io = NULL;
nmem = 0;
for (rp = sc->sc_range; rp < sc->sc_range + sc->sc_nrange &&
rp->pci_hi != 0; rp++) {
switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
case OFW_PCI_PHYS_HI_SPACE_CONFIG:
break;
case OFW_PCI_PHYS_HI_SPACE_IO:
io = rp;
break;
case OFW_PCI_PHYS_HI_SPACE_MEM32:
mem[nmem] = rp;
nmem++;
break;
case OFW_PCI_PHYS_HI_SPACE_MEM64:
break;
}
}
if (io == NULL) {
device_printf(dev, "can't find io range\n");
return (ENXIO);
}
sc->sc_io_rman.rm_type = RMAN_ARRAY;
sc->sc_io_rman.rm_descr = "Grackle PCI I/O Ports";
sc->sc_iostart = io->pci_iospace;
if (rman_init(&sc->sc_io_rman) != 0 ||
rman_manage_region(&sc->sc_io_rman, io->pci_lo,
io->pci_lo + io->size_lo) != 0) {
panic("grackle_attach: failed to set up I/O rman");
}
if (nmem == 0) {
device_printf(dev, "can't find mem ranges\n");
return (ENXIO);
}
sc->sc_mem_rman.rm_type = RMAN_ARRAY;
sc->sc_mem_rman.rm_descr = "Grackle PCI Memory";
error = rman_init(&sc->sc_mem_rman);
if (error) {
device_printf(dev, "rman_init() failed. error = %d\n", error);
return (error);
}
for (i = 0; i < nmem; i++) {
error = rman_manage_region(&sc->sc_mem_rman, mem[i]->pci_lo,
mem[i]->pci_lo + mem[i]->size_lo);
if (error) {
device_printf(dev,
"rman_manage_region() failed. error = %d\n", error);
return (error);
}
}
ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(cell_t));
device_add_child(dev, "pci", device_get_unit(dev));
return (bus_generic_attach(dev));
}
static int
grackle_maxslots(device_t dev)
{
return (PCI_SLOTMAX);
return (ofw_pci_attach(dev));
}
static u_int32_t
@ -339,175 +209,6 @@ grackle_write_config(device_t dev, u_int bus, u_int slot, u_int func,
grackle_disable_config(sc);
}
static int
grackle_route_interrupt(device_t bus, device_t dev, int pin)
{
struct grackle_softc *sc;
struct ofw_pci_register reg;
uint32_t pintr, mintr;
phandle_t iparent;
uint8_t maskbuf[sizeof(reg) + sizeof(pintr)];
sc = device_get_softc(bus);
pintr = pin;
if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), &sc->sc_pci_iinfo, &reg,
sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr),
&iparent, maskbuf))
return (MAP_IRQ(iparent, mintr));
/* Maybe it's a real interrupt, not an intpin */
if (pin > 4)
return (pin);
device_printf(bus, "could not route pin %d for device %d.%d\n",
pin, pci_get_slot(dev), pci_get_function(dev));
return (PCI_INVALID_IRQ);
}
static int
grackle_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
{
struct grackle_softc *sc;
sc = device_get_softc(dev);
switch (which) {
case PCIB_IVAR_DOMAIN:
*result = 0;
return (0);
case PCIB_IVAR_BUS:
*result = sc->sc_bus;
return (0);
}
return (ENOENT);
}
static struct resource *
grackle_alloc_resource(device_t bus, device_t child, int type, int *rid,
u_long start, u_long end, u_long count, u_int flags)
{
struct grackle_softc *sc;
struct resource *rv;
struct rman *rm;
int needactivate;
needactivate = flags & RF_ACTIVE;
flags &= ~RF_ACTIVE;
sc = device_get_softc(bus);
switch (type) {
case SYS_RES_MEMORY:
rm = &sc->sc_mem_rman;
break;
case SYS_RES_IOPORT:
rm = &sc->sc_io_rman;
break;
case SYS_RES_IRQ:
return (bus_alloc_resource(bus, type, rid, start, end, count,
flags));
default:
device_printf(bus, "unknown resource request from %s\n",
device_get_nameunit(child));
return (NULL);
}
rv = rman_reserve_resource(rm, start, end, count, flags, child);
if (rv == NULL) {
device_printf(bus, "failed to reserve resource for %s\n",
device_get_nameunit(child));
return (NULL);
}
rman_set_rid(rv, *rid);
if (needactivate) {
if (bus_activate_resource(child, type, *rid, rv) != 0) {
device_printf(bus,
"failed to activate resource for %s\n",
device_get_nameunit(child));
rman_release_resource(rv);
return (NULL);
}
}
return (rv);
}
static int
grackle_release_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
{
if (rman_get_flags(res) & RF_ACTIVE) {
int error = bus_deactivate_resource(child, type, rid, res);
if (error)
return error;
}
return (rman_release_resource(res));
}
static int
grackle_activate_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
{
struct grackle_softc *sc;
void *p;
sc = device_get_softc(bus);
if (type == SYS_RES_IRQ) {
return (bus_activate_resource(bus, type, rid, res));
}
if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
vm_offset_t start;
start = (vm_offset_t)rman_get_start(res);
/*
* For i/o-ports, convert the start address to the
* MPC106 PCI i/o window
*/
if (type == SYS_RES_IOPORT)
start += sc->sc_iostart;
if (bootverbose)
printf("grackle mapdev: start %zx, len %ld\n", start,
rman_get_size(res));
p = pmap_mapdev(start, (vm_size_t)rman_get_size(res));
if (p == NULL)
return (ENOMEM);
rman_set_virtual(res, p);
rman_set_bustag(res, &bs_le_tag);
rman_set_bushandle(res, (u_long)p);
}
return (rman_activate_resource(res));
}
static int
grackle_deactivate_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
{
/*
* If this is a memory resource, unmap it.
*/
if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) {
u_int32_t psize;
psize = rman_get_size(res);
pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize);
}
return (rman_deactivate_resource(res));
}
static int
grackle_enable_config(struct grackle_softc *sc, u_int bus, u_int slot,
u_int func, u_int reg)
@ -537,17 +238,6 @@ grackle_disable_config(struct grackle_softc *sc)
out32rb(sc->sc_addr, 0);
}
static phandle_t
grackle_get_node(device_t bus, device_t dev)
{
struct grackle_softc *sc;
sc = device_get_softc(bus);
/* We only have one child, the PCI bus, which needs our own node. */
return sc->sc_node;
}
/*
* Driver to swallow Grackle host bridges from the PCI bus side.
*/

22
sys/powerpc/powermac/gracklevar.h
View File

@ -30,30 +30,10 @@
#ifndef _POWERPC_POWERMAC_GRACKLEVAR_H_
#define _POWERPC_POWERMAC_GRACKLEVAR_H_
struct grackle_range {
u_int32_t pci_hi;
u_int32_t pci_mid;
u_int32_t pci_lo;
u_int32_t pci_iospace;
u_int32_t size_hi;
u_int32_t size_lo;
};
struct grackle_softc {
device_t sc_dev;
phandle_t sc_node;
struct ofw_pci_softc pci_sc;
vm_offset_t sc_addr;
vm_offset_t sc_data;
int sc_bus;
struct grackle_range sc_range[7];
int sc_nrange;
int sc_iostart;
struct rman sc_io_rman;
struct rman sc_mem_rman;
bus_space_tag_t sc_memt;
bus_dma_tag_t sc_dmat;
struct ofw_bus_iinfo sc_pci_iinfo;
};
/*

305
sys/powerpc/powermac/uninorthpci.c
View File

@ -49,6 +49,7 @@ __FBSDID("$FreeBSD$");
#include <sys/rman.h>
#include <powerpc/ofw/ofw_pci.h>
#include <powerpc/powermac/uninorthvar.h>
#include <vm/vm.h>
@ -64,32 +65,13 @@ __FBSDID("$FreeBSD$");
static int uninorth_probe(device_t);
static int uninorth_attach(device_t);
/*
* Bus interface.
*/
static int uninorth_read_ivar(device_t, device_t, int,
uintptr_t *);
static struct resource * uninorth_alloc_resource(device_t bus,
device_t child, int type, int *rid, u_long start,
u_long end, u_long count, u_int flags);
static int uninorth_activate_resource(device_t bus, device_t child,
int type, int rid, struct resource *res);
/*
* pcib interface.
*/
static int uninorth_maxslots(device_t);
static u_int32_t uninorth_read_config(device_t, u_int, u_int, u_int,
u_int, int);
static void uninorth_write_config(device_t, u_int, u_int, u_int,
u_int, u_int32_t, int);
static int uninorth_route_interrupt(device_t, device_t, int);
/*
* OFW Bus interface
*/
static phandle_t uninorth_get_node(device_t bus, device_t dev);
/*
* Local routines.
@ -105,33 +87,17 @@ static device_method_t uninorth_methods[] = {
DEVMETHOD(device_probe, uninorth_probe),
DEVMETHOD(device_attach, uninorth_attach),
/* Bus interface */
DEVMETHOD(bus_read_ivar, uninorth_read_ivar),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
DEVMETHOD(bus_alloc_resource, uninorth_alloc_resource),
DEVMETHOD(bus_activate_resource, uninorth_activate_resource),
/* pcib interface */
DEVMETHOD(pcib_maxslots, uninorth_maxslots),
DEVMETHOD(pcib_read_config, uninorth_read_config),
DEVMETHOD(pcib_write_config, uninorth_write_config),
DEVMETHOD(pcib_route_interrupt, uninorth_route_interrupt),
/* ofw_bus interface */
DEVMETHOD(ofw_bus_get_node, uninorth_get_node),
DEVMETHOD_END
};
static driver_t uninorth_driver = {
"pcib",
uninorth_methods,
sizeof(struct uninorth_softc)
};
static devclass_t uninorth_devclass;
DEFINE_CLASS_1(pcib, uninorth_driver, uninorth_methods,
sizeof(struct uninorth_softc), ofw_pci_driver);
DRIVER_MODULE(uninorth, nexus, uninorth_driver, uninorth_devclass, 0, 0);
static int
@ -168,9 +134,7 @@ uninorth_attach(device_t dev)
struct uninorth_softc *sc;
const char *compatible;
phandle_t node;
u_int32_t reg[3], busrange[2];
struct uninorth_range *rp, *io, *mem[2];
int nmem, i, error;
u_int32_t reg[3];
node = ofw_bus_get_node(dev);
sc = device_get_softc(dev);
@ -178,9 +142,6 @@ uninorth_attach(device_t dev)
if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8)
return (ENXIO);
if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8)
return (ENXIO);
sc->sc_ver = 0;
compatible = ofw_bus_get_compat(dev);
if (strcmp(compatible, "u3-agp") == 0)
@ -188,8 +149,6 @@ uninorth_attach(device_t dev)
if (strcmp(compatible, "u4-pcie") == 0)
sc->sc_ver = 4;
sc->sc_dev = dev;
sc->sc_node = node;
if (sc->sc_ver >= 3) {
sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[1] + 0x800000, PAGE_SIZE);
sc->sc_data = (vm_offset_t)pmap_mapdev(reg[1] + 0xc00000, PAGE_SIZE);
@ -197,108 +156,8 @@ uninorth_attach(device_t dev)
sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[0] + 0x800000, PAGE_SIZE);
sc->sc_data = (vm_offset_t)pmap_mapdev(reg[0] + 0xc00000, PAGE_SIZE);
}
sc->sc_bus = busrange[0];
bzero(sc->sc_range, sizeof(sc->sc_range));
if (sc->sc_ver >= 3) {
/*
* On Apple U3 systems, we have an otherwise standard
* Uninorth controller driving AGP. The one difference
* is that it uses a new PCI ranges format, so do the
* translation.
*/
struct uninorth_range64 range64[6];
bzero(range64, sizeof(range64));
sc->sc_nrange = OF_getprop(node, "ranges", range64,
sizeof(range64));
for (i = 0; range64[i].pci_hi != 0; i++) {
sc->sc_range[i].pci_hi = range64[i].pci_hi;
sc->sc_range[i].pci_mid = range64[i].pci_mid;
sc->sc_range[i].pci_lo = range64[i].pci_lo;
sc->sc_range[i].host = range64[i].host_lo;
sc->sc_range[i].size_hi = range64[i].size_hi;
sc->sc_range[i].size_lo = range64[i].size_lo;
}
} else {
sc->sc_nrange = OF_getprop(node, "ranges", sc->sc_range,
sizeof(sc->sc_range));
}
if (sc->sc_nrange == -1) {
device_printf(dev, "could not get ranges\n");
return (ENXIO);
}
sc->sc_nrange /= sizeof(sc->sc_range[0]);
sc->sc_range[6].pci_hi = 0;
io = NULL;
nmem = 0;
for (rp = sc->sc_range; rp < sc->sc_range + sc->sc_nrange &&
rp->pci_hi != 0; rp++) {
switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
case OFW_PCI_PHYS_HI_SPACE_CONFIG:
break;
case OFW_PCI_PHYS_HI_SPACE_IO:
io = rp;
break;
case OFW_PCI_PHYS_HI_SPACE_MEM32:
mem[nmem] = rp;
nmem++;
break;
case OFW_PCI_PHYS_HI_SPACE_MEM64:
break;
}
}
if (io == NULL) {
device_printf(dev, "can't find io range\n");
return (ENXIO);
}
sc->sc_io_rman.rm_type = RMAN_ARRAY;
sc->sc_io_rman.rm_descr = "UniNorth PCI I/O Ports";
sc->sc_iostart = io->host;
if (rman_init(&sc->sc_io_rman) != 0 ||
rman_manage_region(&sc->sc_io_rman, io->pci_lo,
io->pci_lo + io->size_lo - 1) != 0) {
panic("uninorth_attach: failed to set up I/O rman");
}
if (nmem == 0) {
device_printf(dev, "can't find mem ranges\n");
return (ENXIO);
}
sc->sc_mem_rman.rm_type = RMAN_ARRAY;
sc->sc_mem_rman.rm_descr = "UniNorth PCI Memory";
error = rman_init(&sc->sc_mem_rman);
if (error) {
device_printf(dev, "rman_init() failed. error = %d\n", error);
return (error);
}
for (i = 0; i < nmem; i++) {
error = rman_manage_region(&sc->sc_mem_rman, mem[i]->pci_lo,
mem[i]->pci_lo + mem[i]->size_lo - 1);
if (error) {
device_printf(dev,
"rman_manage_region() failed. error = %d\n", error);
return (error);
}
}
ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(cell_t));
device_add_child(dev, "pci", device_get_unit(dev));
return (bus_generic_attach(dev));
}
static int
uninorth_maxslots(device_t dev)
{
return (PCI_SLOTMAX);
return (ofw_pci_attach(dev));
}
static u_int32_t
@ -353,143 +212,6 @@ uninorth_write_config(device_t dev, u_int bus, u_int slot, u_int func,
}
}
static int
uninorth_route_interrupt(device_t bus, device_t dev, int pin)
{
struct uninorth_softc *sc;
struct ofw_pci_register reg;
uint32_t pintr, mintr;
phandle_t iparent;
uint8_t maskbuf[sizeof(reg) + sizeof(pintr)];
sc = device_get_softc(bus);
pintr = pin;
if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), &sc->sc_pci_iinfo, &reg,
sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr),
&iparent, maskbuf))
return (MAP_IRQ(iparent, mintr));
/* Maybe it's a real interrupt, not an intpin */
if (pin > 4)
return (pin);
device_printf(bus, "could not route pin %d for device %d.%d\n",
pin, pci_get_slot(dev), pci_get_function(dev));
return (PCI_INVALID_IRQ);
}
static int
uninorth_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
{
struct uninorth_softc *sc;
sc = device_get_softc(dev);
switch (which) {
case PCIB_IVAR_DOMAIN:
*result = device_get_unit(dev);
return (0);
case PCIB_IVAR_BUS:
*result = sc->sc_bus;
return (0);
}
return (ENOENT);
}
static struct resource *
uninorth_alloc_resource(device_t bus, device_t child, int type, int *rid,
u_long start, u_long end, u_long count, u_int flags)
{
struct uninorth_softc *sc;
struct resource *rv;
struct rman *rm;
int needactivate;
needactivate = flags & RF_ACTIVE;
flags &= ~RF_ACTIVE;
sc = device_get_softc(bus);
switch (type) {
case SYS_RES_MEMORY:
rm = &sc->sc_mem_rman;
break;
case SYS_RES_IOPORT:
rm = &sc->sc_io_rman;
break;
case SYS_RES_IRQ:
return (bus_alloc_resource(bus, type, rid, start, end, count,
flags));
default:
device_printf(bus, "unknown resource request from %s\n",
device_get_nameunit(child));
return (NULL);
}
rv = rman_reserve_resource(rm, start, end, count, flags, child);
if (rv == NULL) {
device_printf(bus, "failed to reserve resource for %s\n",
device_get_nameunit(child));
return (NULL);
}
rman_set_rid(rv, *rid);
if (needactivate) {
if (bus_activate_resource(child, type, *rid, rv) != 0) {
device_printf(bus,
"failed to activate resource for %s\n",
device_get_nameunit(child));
rman_release_resource(rv);
return (NULL);
}
}
return (rv);
}
static int
uninorth_activate_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
{
void *p;
struct uninorth_softc *sc;
sc = device_get_softc(bus);
if (type == SYS_RES_IRQ)
return (bus_activate_resource(bus, type, rid, res));
if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
vm_offset_t start;
start = (vm_offset_t)rman_get_start(res);
/*
* For i/o-ports, convert the start address to the
* uninorth PCI i/o window
*/
if (type == SYS_RES_IOPORT)
start += sc->sc_iostart;
if (bootverbose)
printf("uninorth mapdev: start %zx, len %ld\n", start,
rman_get_size(res));
p = pmap_mapdev(start, (vm_size_t)rman_get_size(res));
if (p == NULL)
return (ENOMEM);
rman_set_virtual(res, p);
rman_set_bustag(res, &bs_le_tag);
rman_set_bushandle(res, (u_long)p);
}
return (rman_activate_resource(res));
}
static int
uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot,
u_int func, u_int reg)
@ -497,8 +219,8 @@ uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot,
uint32_t cfgval;
uint32_t pass;
if (resource_int_value(device_get_name(sc->sc_dev),
device_get_unit(sc->sc_dev), "skipslot", &pass) == 0) {
if (resource_int_value(device_get_name(sc->pci_sc.sc_dev),
device_get_unit(sc->pci_sc.sc_dev), "skipslot", &pass) == 0) {
if (pass == slot)
return (0);
}
@ -510,7 +232,7 @@ uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot,
* PCI Express <-> PCI Express bridge not present in the device tree,
* and we need to route all of our configuration space through it.
*/
if (sc->sc_bus == bus && sc->sc_ver < 4) {
if (sc->pci_sc.sc_bus == bus && sc->sc_ver < 4) {
/*
* No slots less than 11 on the primary bus on U3 and lower
*/
@ -534,14 +256,3 @@ uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot,
return (1);
}
static phandle_t
uninorth_get_node(device_t bus, device_t dev)
{
struct uninorth_softc *sc;
sc = device_get_softc(bus);
/* We only have one child, the PCI bus, which needs our own node. */
return sc->sc_node;
}

33
sys/powerpc/powermac/uninorthvar.h
View File

@ -28,41 +28,12 @@
#ifndef _POWERPC_POWERMAC_UNINORTHVAR_H_
#define _POWERPC_POWERMAC_UNINORTHVAR_H_
struct uninorth_range {
u_int32_t pci_hi;
u_int32_t pci_mid;
u_int32_t pci_lo;
u_int32_t host;
u_int32_t size_hi;
u_int32_t size_lo;
};
struct uninorth_range64 {
u_int32_t pci_hi;
u_int32_t pci_mid;
u_int32_t pci_lo;
u_int32_t host_hi;
u_int32_t host_lo;
u_int32_t size_hi;
u_int32_t size_lo;
};
#include <powerpc/ofw/ofw_pci.h>
struct uninorth_softc {
device_t sc_dev;
phandle_t sc_node;
struct ofw_pci_softc pci_sc;
vm_offset_t sc_addr;
vm_offset_t sc_data;
int sc_bus;
struct uninorth_range sc_range[7];
int sc_nrange;
int sc_iostart;
struct rman sc_io_rman;
struct rman sc_mem_rman;
bus_space_tag_t sc_iot;
bus_space_tag_t sc_memt;
bus_dma_tag_t sc_dmat;
struct ofw_bus_iinfo sc_pci_iinfo;
int sc_ver;
};