Almost all copies of platform_mp_init_secondary just called

intr_pic_init_secondary. Replace them with a direct call. On BCM2836
and ARMADA XP we need to add this function, but it can be empty.

Reviewed by:	ian, imp
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D5460
This commit is contained in:
Andrew Turner 2016-02-26 16:04:47 +00:00
parent 7eb9cc0975
commit 7133fe0f33
17 changed files with 13 additions and 97 deletions

View File

@ -58,13 +58,6 @@ __FBSDID("$FreeBSD$");
#define CPUCFG_DBGCTL0 0x1e0
#define CPUCFG_DBGCTL1 0x1e4
void
platform_mp_init_secondary(void)
{
intr_pic_init_secondary();
}
void
platform_mp_setmaxid(void)
{

View File

@ -84,13 +84,6 @@ socfpga_trampoline(void)
"1: .space 4\n");
}
void
platform_mp_init_secondary(void)
{
intr_pic_init_secondary();
}
void
platform_mp_setmaxid(void)
{

View File

@ -341,21 +341,6 @@ power_on_cpu(int cpu)
}
}
void
platform_mp_init_secondary(void)
{
/*
* Consider modifying the timer driver to support
* per-cpu timers and then enabling the timer for
* each AP.
*/
intr_pic_init_secondary();
}
void
platform_mp_setmaxid(void)
{

View File

@ -118,13 +118,6 @@ platform_mp_get_core_cnt(void)
return (ncores);
}
void
platform_mp_init_secondary(void)
{
intr_pic_init_secondary();
}
void
platform_mp_setmaxid(void)
{

View File

@ -234,7 +234,7 @@ init_secondary(int cpu)
cpu_initclocks_ap();
CTR0(KTR_SMP, "go into scheduler");
platform_mp_init_secondary();
intr_pic_init_secondary();
/* Enter the scheduler */
sched_throw(NULL);

View File

@ -240,3 +240,10 @@ arm_unmask_irq(uintptr_t nb)
else
printf("arm_mask_irq: Invalid IRQ number: %d\n", nb);
}
#ifdef SMP
void
intr_pic_init_secondary(void)
{
}
#endif

View File

@ -76,12 +76,6 @@ static bus_space_handle_t bs_periph;
#define BSWR4(addr, val) \
bus_space_write_4(fdtbus_bs_tag, bs_periph, (addr), (val))
void
platform_mp_init_secondary(void)
{
}
void
platform_mp_setmaxid(void)
{

View File

@ -66,13 +66,6 @@ __FBSDID("$FreeBSD$");
#define SRC_GPR0_C1FUNC 0x20 /* Register for Core 1 entry func */
#define SRC_GPR1_C1ARG 0x24 /* Register for Core 1 entry arg */
void
platform_mp_init_secondary(void)
{
intr_pic_init_secondary();
}
void
platform_mp_setmaxid(void)
{

View File

@ -46,7 +46,6 @@ int pic_ipi_read(int arg);
/* Platform interface */
void platform_mp_setmaxid(void);
void platform_mp_start_ap(void);
void platform_mp_init_secondary(void);
/* global data in mp_machdep.c */
extern struct pcb stoppcbs[];

View File

@ -130,13 +130,6 @@ platform_mp_setmaxid(void)
mp_maxid = 1;
}
void
platform_mp_init_secondary(void)
{
intr_pic_init_secondary();
}
void
platform_mp_start_ap(void)
{

View File

@ -87,11 +87,6 @@ platform_mp_setmaxid(void)
mp_maxid = mp_ncpus - 1;
}
void
platform_mp_init_secondary(void)
{
}
void mptramp(void);
void mptramp_end(void);
extern vm_offset_t mptramp_pmu_boot;

View File

@ -360,6 +360,11 @@ mv_msi_data(int irq, uint64_t *addr, uint32_t *data)
}
#if defined(SMP)
void
intr_pic_init_secondary(void)
{
}
void
pic_ipi_send(cpuset_t cpus, u_int ipi)
{

View File

@ -90,10 +90,3 @@ platform_mp_start_ap(void)
ofw_cpu_early_foreach(virt_start_ap, true);
}
void
platform_mp_init_secondary(void)
{
intr_pic_init_secondary();
}

View File

@ -79,13 +79,6 @@ rk30xx_boot2(void)
"1: .space 4\n");
}
void
platform_mp_init_secondary(void)
{
intr_pic_init_secondary();
}
void
platform_mp_setmaxid(void)
{

View File

@ -70,13 +70,6 @@ exynos_get_soc_id(void)
return (reg & EXYNOS5_SOC_ID_MASK);
}
void
platform_mp_init_secondary(void)
{
intr_pic_init_secondary();
}
void
platform_mp_setmaxid(void)
{

View File

@ -42,12 +42,6 @@ __FBSDID("$FreeBSD$");
#include <arm/ti/ti_smc.h>
#include <arm/ti/omap4/omap4_smc.h>
void
platform_mp_init_secondary(void)
{
intr_pic_init_secondary();
}
void
platform_mp_setmaxid(void)
{

View File

@ -46,13 +46,6 @@ __FBSDID("$FreeBSD$");
#define SCU_CONTROL_REG 0xf8f00000
#define SCU_CONTROL_ENABLE (1 << 0)
void
platform_mp_init_secondary(void)
{
intr_pic_init_secondary();
}
void
platform_mp_setmaxid(void)
{