Revert part of the "BIOS brain damage" from rev 1.10. It seems that

different BIOSs use the same exact settings to mean two very different and
incompatible things for the SCI.  Thus, if the SCI is remapped to a PCI
interrupt, we now trust the trigger/polarity that the MADT provides by
default.  However, the SCI can be forced to level/lo as 1.10 did by setting
the tunable "hw.acpi.force_sci_lo" to a non-zero value from the loader.

Thus, if rev 1.10 caused an interrupt storm, it should nwo fix your
machine.  If rev 1.10 fixed an interrupt storm on your machine, you
probably need to set the aforementioned tunable in /boot/loader.conf to
prevent the interrupt storm.

The more general problem of getting the SCI's trigger/polarity programmed
"correctly" (for some value of correctly meaning several workarounds for
broken BIOSs and inconsistent "implementations" of the ACPI standard) is
going to require more work, but this band-aid should improve the current
situation somewhat.

Requested by:	njl
This commit is contained in:
jhb 2004-04-16 19:46:30 +00:00
parent 9566eec4b5
commit 72693493fd

View File

@ -69,6 +69,8 @@ struct lapic_info {
u_int la_apic_id:8;
} lapics[NLAPICS + 1];
static int force_sci_lo;
TUNABLE_INT("hw.acpi.force_sci_lo", &force_sci_lo);
static MULTIPLE_APIC_TABLE *madt;
static vm_paddr_t madt_physaddr;
static vm_offset_t madt_length;
@ -545,14 +547,13 @@ madt_parse_interrupt_override(MADT_INTERRUPT_OVERRIDE *intr)
}
/*
* If the SCI is remapped to a non-ISA global interrupt,
* force it to level trigger and active-lo polarity.
* If the SCI is identity mapped but has edge trigger and
* active-hi polarity, also force it to use level/lo.
* active-hi polarity or the force_sci_lo tunable is set,
* force it to use level/lo.
*/
force_lo = 0;
if (intr->Source == AcpiGbl_FADT->SciInt)
if (intr->Interrupt > 15 || (intr->Interrupt == intr->Source &&
if (force_sci_lo || (intr->Interrupt == intr->Source &&
intr->TriggerMode == TRIGGER_EDGE &&
intr->Polarity == POLARITY_ACTIVE_HIGH))
force_lo = 1;