Revert part of the "BIOS brain damage" from rev 1.10. It seems that
different BIOSs use the same exact settings to mean two very different and incompatible things for the SCI. Thus, if the SCI is remapped to a PCI interrupt, we now trust the trigger/polarity that the MADT provides by default. However, the SCI can be forced to level/lo as 1.10 did by setting the tunable "hw.acpi.force_sci_lo" to a non-zero value from the loader. Thus, if rev 1.10 caused an interrupt storm, it should nwo fix your machine. If rev 1.10 fixed an interrupt storm on your machine, you probably need to set the aforementioned tunable in /boot/loader.conf to prevent the interrupt storm. The more general problem of getting the SCI's trigger/polarity programmed "correctly" (for some value of correctly meaning several workarounds for broken BIOSs and inconsistent "implementations" of the ACPI standard) is going to require more work, but this band-aid should improve the current situation somewhat. Requested by: njl
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@ -69,6 +69,8 @@ struct lapic_info {
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u_int la_apic_id:8;
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} lapics[NLAPICS + 1];
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static int force_sci_lo;
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TUNABLE_INT("hw.acpi.force_sci_lo", &force_sci_lo);
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static MULTIPLE_APIC_TABLE *madt;
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static vm_paddr_t madt_physaddr;
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static vm_offset_t madt_length;
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@ -545,14 +547,13 @@ madt_parse_interrupt_override(MADT_INTERRUPT_OVERRIDE *intr)
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}
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/*
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* If the SCI is remapped to a non-ISA global interrupt,
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* force it to level trigger and active-lo polarity.
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* If the SCI is identity mapped but has edge trigger and
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* active-hi polarity, also force it to use level/lo.
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* active-hi polarity or the force_sci_lo tunable is set,
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* force it to use level/lo.
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*/
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force_lo = 0;
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if (intr->Source == AcpiGbl_FADT->SciInt)
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if (intr->Interrupt > 15 || (intr->Interrupt == intr->Source &&
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if (force_sci_lo || (intr->Interrupt == intr->Source &&
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intr->TriggerMode == TRIGGER_EDGE &&
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intr->Polarity == POLARITY_ACTIVE_HIGH))
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force_lo = 1;
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