From 73ace5c46979ef9ea22f7fe5c4e1b15ad9159f09 Mon Sep 17 00:00:00 2001 From: kevans Date: Sun, 31 Dec 2017 22:35:32 +0000 Subject: [PATCH] aw_sid: Add support for a64 Newer Allwinner SoCs have nearly identical SID controllers with efuse space starting at 0x200 into their register space and thermal data available at 0x234, making all of these fairly trivial additions. The h3 will be added at a later time after some testing, due to a silicon bug that causes the rootkey (at least) to be read incorrectly unless first read via the control register. --- sys/arm/allwinner/aw_sid.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/sys/arm/allwinner/aw_sid.c b/sys/arm/allwinner/aw_sid.c index 409db6eb10c6..ecc12567bb19 100644 --- a/sys/arm/allwinner/aw_sid.c +++ b/sys/arm/allwinner/aw_sid.c @@ -67,6 +67,11 @@ static const struct aw_sid_conf a20_conf = { .rootkey_offset = 0, }; +static const struct aw_sid_conf a64_conf = { + .rootkey_offset = SID_SRAM, + .has_thermal = true, +}; + static const struct aw_sid_conf a83t_conf = { .rootkey_offset = SID_SRAM, .has_thermal = true, @@ -75,6 +80,7 @@ static const struct aw_sid_conf a83t_conf = { static struct ofw_compat_data compat_data[] = { { "allwinner,sun4i-a10-sid", (uintptr_t)&a10_conf}, { "allwinner,sun7i-a20-sid", (uintptr_t)&a20_conf}, + { "allwinner,sun50i-a64-sid", (uintptr_t)&a64_conf}, { "allwinner,sun8i-a83t-sid", (uintptr_t)&a83t_conf}, { NULL, 0 } };