From 7444aac7c6b9edf84b68e4c0f41a3d6e1d7029f7 Mon Sep 17 00:00:00 2001 From: mav Date: Sun, 20 Dec 2009 15:03:57 +0000 Subject: [PATCH] Fairly set master/slave shared PIO/WDMA timings on ITE 821x controllers. Previous implementation could only limit mode, but not rise it back. --- sys/dev/ata/chipsets/ata-ite.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/sys/dev/ata/chipsets/ata-ite.c b/sys/dev/ata/chipsets/ata-ite.c index f8bc57dff9be..8c0a2c598f63 100644 --- a/sys/dev/ata/chipsets/ata-ite.c +++ b/sys/dev/ata/chipsets/ata-ite.c @@ -105,6 +105,8 @@ ata_ite_chipinit(device_t dev) pci_write_config(dev, 0x56, 0x31, 1); ctlr->setmode = ata_ite_821x_setmode; + /* No timing restrictions initally. */ + ctlr->chipset_data = (void *)0; } ctlr->ch_attach = ata_ite_ch_attach; return 0; @@ -129,6 +131,7 @@ ata_ite_821x_setmode(device_t dev, int target, int mode) struct ata_channel *ch = device_get_softc(dev); int devno = (ch->unit << 1) + target; int piomode; + uint8_t *timings = (uint8_t*)(&ctlr->chipset_data); u_int8_t udmatiming[] = { 0x44, 0x42, 0x31, 0x21, 0x11, 0xa2, 0x91 }; u_int8_t chtiming[] = @@ -158,11 +161,10 @@ ata_ite_821x_setmode(device_t dev, int target, int mode) (1 << (devno + 3)), 1); piomode = mode; } + timings[devno] = chtiming[ata_mode2idx(piomode)]; /* set active and recover timing (shared between master & slave) */ - if (pci_read_config(parent, 0x54 + (ch->unit << 2), 1) < - chtiming[ata_mode2idx(piomode)]) - pci_write_config(parent, 0x54 + (ch->unit << 2), - chtiming[ata_mode2idx(piomode)], 1); + pci_write_config(parent, 0x54 + (ch->unit << 2), + max(timings[ch->unit << 1], timings[(ch->unit << 1) + 1]), 1); return (mode); }