Break out the hardware handoff and TX DMA restart code into methods.
These (and a few others) will differ based on the underlying DMA implementation. For the EDMA NICs, simply stub them out in a fashion which will let me focus on implementing the necessary descriptor API changes.
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@ -639,8 +639,8 @@ ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq,
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*
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* This must be called whether the queue is empty or not.
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*/
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void
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ath_txq_restart_dma(struct ath_softc *sc, struct ath_txq *txq)
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static void
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ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq)
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{
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struct ath_hal *ah = sc->sc_ah;
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struct ath_buf *bf, *bf_last;
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@ -668,7 +668,8 @@ ath_txq_restart_dma(struct ath_softc *sc, struct ath_txq *txq)
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* The relevant hardware txq should be locked.
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*/
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static void
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ath_tx_handoff(struct ath_softc *sc, struct ath_txq *txq, struct ath_buf *bf)
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ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq,
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struct ath_buf *bf)
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{
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ATH_TXQ_LOCK_ASSERT(txq);
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@ -4493,4 +4494,7 @@ ath_xmit_setup_legacy(struct ath_softc *sc)
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sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup;
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sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown;
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sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart;
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sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff;
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}
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@ -79,7 +79,6 @@
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#define BAW_WITHIN(_start, _bawsz, _seqno) \
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((((_seqno) - (_start)) & 4095) < (_bawsz))
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extern void ath_txq_restart_dma(struct ath_softc *sc, struct ath_txq *txq);
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extern void ath_freetx(struct mbuf *m);
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extern void ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an);
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extern void ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq);
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@ -131,6 +130,10 @@ extern void ath_addba_response_timeout(struct ieee80211_node *ni,
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(_sc)->sc_tx.xmit_setup(_sc)
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#define ath_txdma_teardown(_sc) \
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(_sc)->sc_tx.xmit_teardown(_sc)
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#define ath_txq_restart_dma(_sc, _txq) \
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(_sc)->sc_tx.xmit_dma_restart((_sc), (_txq))
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#define ath_tx_handoff(_sc, _txq, _bf) \
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(_sc)->sc_tx.xmit_handoff((_sc), (_txq), (_bf))
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extern void ath_xmit_setup_legacy(struct ath_softc *sc);
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#endif
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@ -130,6 +130,62 @@ __FBSDID("$FreeBSD$");
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MALLOC_DECLARE(M_ATHDEV);
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/*
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* Re-initialise the DMA FIFO with the current contents of
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* said FIFO.
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*
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* This should only be called as part of the chip reset path, as it
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* assumes the FIFO is currently empty.
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*
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* TODO: verify that a cold/warm reset does clear the TX FIFO, so
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* writing in a partially-filled FIFO will not cause double-entries
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* to appear.
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*/
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static void
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ath_edma_dma_restart(struct ath_softc *sc, struct ath_txq *txq)
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{
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device_printf(sc->sc_dev, "%s: called: txq=%p, qnum=%d\n",
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__func__,
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txq,
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txq->axq_qnum);
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}
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/*
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* Handoff this frame to the hardware.
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*
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* For the multicast queue, this will treat it as a software queue
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* and append it to the list, after updating the MORE_DATA flag
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* in the previous frame. The cabq processing code will ensure
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* that the queue contents gets transferred over.
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*
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* For the hardware queues, this will queue a frame to the queue
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* like before, then populate the FIFO from that. Since the
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* EDMA hardware has 8 FIFO slots per TXQ, this ensures that
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* frames such as management frames don't get prematurely dropped.
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*
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* This does imply that a similar flush-hwq-to-fifoq method will
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* need to be called from the processq function, before the
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* per-node software scheduler is called.
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*/
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static void
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ath_edma_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq,
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struct ath_buf *bf)
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{
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device_printf(sc->sc_dev, "%s: called; bf=%p, txq=%p, qnum=%d\n",
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__func__,
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bf,
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txq,
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txq->axq_qnum);
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/*
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* XXX For now this is a placeholder; free the buffer
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* and inform the stack that the TX failed.
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*/
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ath_tx_default_comp(sc, bf, 1);
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}
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static int
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ath_edma_setup_txfifo(struct ath_softc *sc, int qnum)
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{
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@ -217,4 +273,7 @@ ath_xmit_setup_edma(struct ath_softc *sc)
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sc->sc_tx.xmit_setup = ath_edma_dma_txsetup;
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sc->sc_tx.xmit_teardown = ath_edma_dma_txteardown;
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sc->sc_tx.xmit_dma_restart = ath_edma_dma_restart;
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sc->sc_tx.xmit_handoff = ath_edma_xmit_handoff;
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}
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