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Let the platform calculate the timer frequency at runtime, and use that for

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the omap4, instead of relying on the (wrong) value provided in the dts.
This commit is contained in:
Olivier Houchard 2013-08-05 20:14:56 +00:00
parent 7d26db1792
commit 7497e6267c
3 changed files with 26 additions and 14 deletions
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19
sys/arm/arm/mpcore_timer.c
View File

@ -115,6 +115,8 @@ static struct resource_spec arm_tmr_spec[] = {
static struct arm_tmr_softc *arm_tmr_sc = NULL;
uint32_t platform_arm_tmr_freq = 0;
#define tmr_prv_read_4(reg) \
bus_space_read_4(arm_tmr_sc->prv_bst, arm_tmr_sc->prv_bsh, reg)
#define tmr_prv_write_4(reg, val) \
@ -274,13 +276,18 @@ arm_tmr_attach(device_t dev)
if (arm_tmr_sc)
return (ENXIO);
/* Get the base clock frequency */
node = ofw_bus_get_node(dev);
if ((OF_getprop(node, "clock-frequency", &clock, sizeof(clock))) <= 0) {
device_printf(dev, "missing clock-frequency attribute in FDT\n");
return (ENXIO);
if (platform_arm_tmr_freq != 0)
sc->clkfreq = platform_arm_tmr_freq;
else {
/* Get the base clock frequency */
node = ofw_bus_get_node(dev);
if ((OF_getprop(node, "clock-frequency", &clock,
sizeof(clock))) <= 0) {
device_printf(dev, "missing clock-frequency attribute in FDT\n");
return (ENXIO);
}
sc->clkfreq = fdt32_to_cpu(clock);
}
sc->clkfreq = fdt32_to_cpu(clock);
if (bus_alloc_resources(dev, arm_tmr_spec, sc->tmr_res)) {

6
sys/arm/ti/omap4/omap4_prcm_clks.c
View File

@ -1384,10 +1384,14 @@ omap4_prcm_probe(device_t dev)
* RETURNS:
* Always returns 0
*/
extern uint32_t platform_arm_tmr_freq;
static int
omap4_prcm_attach(device_t dev)
{
struct omap4_prcm_softc *sc = device_get_softc(dev);
unsigned int freq;
if (bus_alloc_resources(dev, omap4_scm_res_spec, sc->sc_res)) {
device_printf(dev, "could not allocate resources\n");
@ -1396,6 +1400,8 @@ omap4_prcm_attach(device_t dev)
omap4_prcm_sc = sc;
ti_cpu_reset = omap4_prcm_reset;
omap4_clk_get_arm_fclk_freq(NULL, &freq);
platform_arm_tmr_freq = freq / 2;
return (0);
}

15
sys/boot/fdt/dts/pandaboard.dts
View File

@ -64,6 +64,13 @@
< 0x48240100 0x0100 >; /* CPU Interface Registers */
};
omap4_prcm@4a306000 {
compatible = "ti,omap4_prcm";
reg =< 0x4a306000 0x2000
0x4a004000 0x1000
0x4a008000 0x8000>;
};
pl310@48242000 {
compatible = "arm,pl310";
reg = < 0x48242000 0x1000 >;
@ -72,7 +79,6 @@
};
mp_tmr@48240200 {
compatible = "arm,mpcore-timers";
clock-frequency = < 504000000 >;
#address-cells = <1>;
#size-cells = <0>;
reg = < 0x48240200 0x100 >, /* Global Timer Registers */
@ -110,13 +116,6 @@
"ag16", "usbb1_ulpiphy_dat7", "input_pulldown";
};
omap4_prcm@4a306000 {
compatible = "ti,omap4_prcm";
reg =< 0x4a306000 0x2000
0x4a004000 0x1000
0x4a008000 0x8000>;
};
GPIO: gpio {
#gpio-cells = <3>;
compatible = "ti,gpio";