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This fixes several problems with CIS as suggested by Justin Gibbs:

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4) The cardbus CIS code treats the CIS_PTR as a mapping register if
   it is mentioned in the CIS.  I don't have a spec handy to understand
   why the CIS_PTR is mentioned in the CIS, but allocating a memory range
   for it is certainly bogus.  My patch ignores bar #6 to prevent the
   mapping.
   [The pccard spec says that BAR 0 and 7 (-1 and 6 in thic case since we
    did a minus one) is "reserved".  The off by 1 error has been fixed.
    also bar=5 is invalid for IO maps, so we check it.]

5) The CIS code allocated duplicate resources to those already found
   by cardbus_add_resources().  The fix is to pass in the bar computed
   from the CIS instead of the particular resource ID for that bar,
   so bus_generic_alloc_resource succeeds in finding the old resource.
   [fixed, also removed superfluous (and incorrect) writing back to the
    PCI config space.]

7) The CIS code seems to use the wrong bit to determine rather a particular
   register mapping is for I/O or memory space.  From looking at the
   two cards I have, it seems TPL_BAR_REG_AS should be 0x10 instead
   of 0x08.  Otherwise, all registers that should be I/O mapped gain
   a second mapping in memory space.
   [Oops, the spec does say 0x10..., fixed]

Submitted by: Justin Gibbs
This commit is contained in:
jon 2000-11-29 19:38:25 +00:00
parent d7f77b3ec0
commit 74d14ce2cb
2 changed files with 4 additions and 7 deletions
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9
sys/dev/cardbus/cardbus_cis.c
View File

@ -274,7 +274,7 @@ DECODE_PROTOTYPE(bar)
type = SYS_RES_MEMORY; type = SYS_RES_MEMORY;
} }
bar = (reg & TPL_BAR_REG_ASI_MASK) - 1; bar = (reg & TPL_BAR_REG_ASI_MASK) - 1;
if (bar < 0 || bar > 6) { if (bar < 0 || bar > 5 || (type == SYS_RES_IOPORT && bar == 5)) {
device_printf(dev, "Invalid BAR number: %02x(%02x)\n", device_printf(dev, "Invalid BAR number: %02x(%02x)\n",
reg, bar); reg, bar);
return EINVAL; return EINVAL;
@ -282,13 +282,10 @@ DECODE_PROTOTYPE(bar)
bar = CARDBUS_BASE0_REG + bar * 4; bar = CARDBUS_BASE0_REG + bar * 4;
DEVPRINTF((dev, "Opening BAR: type=%s, bar=%02x, len=%04x\n", DEVPRINTF((dev, "Opening BAR: type=%s, bar=%02x, len=%04x\n",
(type==SYS_RES_MEMORY)?"MEM":"IO", bar, len)); (type==SYS_RES_MEMORY)?"MEM":"IO", bar, len));
res = bus_generic_alloc_resource(child, child, type, &reg, 0, res = bus_generic_alloc_resource(child, child, type, &bar, 0,
~0, len, rman_make_alignment_flags(len) | RF_ACTIVE); ~0, len, rman_make_alignment_flags(len) | RF_ACTIVE);
if (res == NULL) { if (res == NULL) {
device_printf(dev, "Cannot allocate BAR %02x\n", reg); device_printf(dev, "Cannot allocate BAR %02x\n", bar);
} else {
start = rman_get_start(res);
pci_write_config(child, reg, start, 4);
} }
} }
return 0; return 0;

2
sys/dev/cardbus/cardbus_cis.h
View File

@ -80,7 +80,7 @@ int cardbus_do_cis(device_t dev, device_t child);
/* BAR */ /* BAR */
#define TPL_BAR_REG_ASI_MASK 0x07 #define TPL_BAR_REG_ASI_MASK 0x07
#define TPL_BAR_REG_AS 0x08 #define TPL_BAR_REG_AS 0x10
/* CISTPL_FUNC */ /* CISTPL_FUNC */
#define TPL_FUNC_MF 0 /* multi function tuple */ #define TPL_FUNC_MF 0 /* multi function tuple */