Integrated I2C controller driver (found in MPC85xx and other SOC parts).
Obtained from: Freescale, Semihalf
This commit is contained in:
Rafal Jaworowski
parent
f987f19301
commit
757cb6dbdf
@ -110,6 +110,7 @@ powerpc/fpu/fpu_sqrt.c optional fpu_emu
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powerpc/fpu/fpu_subr.c optional fpu_emu
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powerpc/mpc85xx/atpic.c optional mpc85xx isa
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powerpc/mpc85xx/isa.c optional mpc85xx isa
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powerpc/mpc85xx/i2c.c optional iicbus mpc85xx
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powerpc/mpc85xx/lbc.c optional mpc85xx
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powerpc/mpc85xx/mpc85xx.c optional mpc85xx
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powerpc/mpc85xx/nexus.c optional mpc85xx
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@ -59,6 +59,8 @@ device da
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device em
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device ether
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device fxp
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device iic
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device iicbus
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device isa
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device loop
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device md
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440
sys/powerpc/mpc85xx/i2c.c
Normal file
440
sys/powerpc/mpc85xx/i2c.c
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@ -0,0 +1,440 @@
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/*-
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* Copyright (C) 2008-2009 Semihalf, Michal Hajduk
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/resource.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <machine/ocpbus.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/iicbus/iicbus.h>
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#include "iicbus_if.h"
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#include <powerpc/mpc85xx/ocpbus.h>
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#define I2C_ADDR_REG 0x00 /* I2C slave address register */
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#define I2C_FDR_REG 0x04 /* I2C frequency divider register */
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#define I2C_CONTROL_REG 0x08 /* I2C control register */
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#define I2C_STATUS_REG 0x0C /* I2C status register */
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#define I2C_DATA_REG 0x10 /* I2C data register */
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#define I2C_DFSRR_REG 0x14 /* I2C Digital Filter Sampling rate */
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#define I2C_ENABLE 0x80 /* Module enable - interrupt disable */
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#define I2CSR_RXAK 0x01 /* Received acknowledge */
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#define I2CSR_MCF (1<<7) /* Data transfer */
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#define I2CSR_MASS (1<<6) /* Addressed as a slave */
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#define I2CSR_MBB (1<<5) /* Bus busy */
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#define I2CSR_MAL (1<<4) /* Arbitration lost */
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#define I2CSR_SRW (1<<2) /* Slave read/write */
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#define I2CSR_MIF (1<<1) /* Module interrupt */
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#define I2CCR_MEN (1<<7) /* Module enable */
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#define I2CCR_MSTA (1<<5) /* Master/slave mode */
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#define I2CCR_MTX (1<<4) /* Transmit/receive mode */
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#define I2CCR_TXAK (1<<3) /* Transfer acknowledge */
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#define I2CCR_RSTA (1<<2) /* Repeated START */
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#define I2C_BAUD_RATE_FAST 0x31
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#define I2C_BAUD_RATE_DEF 0x3F
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#define I2C_DFSSR_DIV 0x10
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#define DEBUG
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#undef DEBUG
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#ifdef DEBUG
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#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt,##args); } while (0)
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#else
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#define debugf(fmt, args...)
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#endif
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struct i2c_softc {
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device_t dev;
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device_t iicbus;
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struct resource *res;
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struct mtx mutex;
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int rid;
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bus_space_handle_t bsh;
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bus_space_tag_t bst;
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};
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static int i2c_probe(device_t);
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static int i2c_attach(device_t);
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static int i2c_repeated_start(device_t dev, u_char slave, int timeout);
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static int i2c_start(device_t dev, u_char slave, int timeout);
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static int i2c_stop(device_t dev);
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static int i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr);
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static int i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay);
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static int i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout);
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static device_method_t i2c_methods[] = {
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DEVMETHOD(device_probe, i2c_probe),
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DEVMETHOD(device_attach, i2c_attach),
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DEVMETHOD(iicbus_callback, iicbus_null_callback),
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DEVMETHOD(iicbus_repeated_start, i2c_repeated_start),
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DEVMETHOD(iicbus_start, i2c_start),
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DEVMETHOD(iicbus_stop, i2c_stop),
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DEVMETHOD(iicbus_reset, i2c_reset),
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DEVMETHOD(iicbus_read, i2c_read),
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DEVMETHOD(iicbus_write, i2c_write),
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DEVMETHOD(iicbus_transfer, iicbus_transfer_gen),
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{ 0, 0 }
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};
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static driver_t i2c_driver = {
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"i2c",
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i2c_methods,
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sizeof(struct i2c_softc),
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};
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static devclass_t i2c_devclass;
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DRIVER_MODULE(i2c, ocpbus, i2c_driver, i2c_devclass, 0, 0);
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DRIVER_MODULE(iicbus, i2c, iicbus_driver, iicbus_devclass, 0, 0);
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static __inline void
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i2c_write_reg(struct i2c_softc *sc, bus_size_t off, uint8_t val)
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{
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bus_space_write_1(sc->bst, sc->bsh, off, val);
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}
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static __inline uint8_t
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i2c_read_reg(struct i2c_softc *sc, bus_size_t off)
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{
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return (bus_space_read_1(sc->bst, sc->bsh, off));
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}
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static __inline void
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i2c_flag_set(struct i2c_softc *sc, bus_size_t off, uint8_t mask)
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{
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uint8_t status;
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status = i2c_read_reg(sc, off);
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status |= mask;
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i2c_write_reg(sc, off, status);
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}
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static int
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i2c_do_wait(device_t dev, struct i2c_softc *sc, int write, int start)
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{
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int err;
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uint8_t status;
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status = i2c_read_reg(sc,I2C_STATUS_REG);
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if (status & I2CSR_MIF) {
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if (write && start && (status & I2CSR_RXAK)) {
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debugf("no ack %s", start ?
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"after sending slave address" : "");
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err = IIC_ENOACK;
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goto error;
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}
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if (status & I2CSR_MAL) {
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debugf("arbitration lost");
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err = IIC_EBUSERR;
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goto error;
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}
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if (!write && !(status & I2CSR_MCF)) {
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debugf("transfer unfinished");
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err = IIC_EBUSERR;
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goto error;
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}
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}
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return (IIC_NOERR);
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error:
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i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
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i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK);
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return (err);
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}
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static int
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i2c_probe(device_t dev)
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{
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device_t parent;
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struct i2c_softc *sc;
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uintptr_t devtype;
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int error;
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parent = device_get_parent(dev);
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error = BUS_READ_IVAR(parent, dev, OCPBUS_IVAR_DEVTYPE, &devtype);
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if (error)
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return (error);
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if (devtype != OCPBUS_DEVTYPE_I2C)
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return (ENXIO);
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sc = device_get_softc(dev);
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sc->rid = 0;
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sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid,
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RF_ACTIVE);
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if (sc->res == NULL) {
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device_printf(dev, "could not allocate resources");
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return (ENXIO);
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}
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sc->bst = rman_get_bustag(sc->res);
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sc->bsh = rman_get_bushandle(sc->res);
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/* Enable I2C */
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i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE);
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bus_release_resource(dev, SYS_RES_MEMORY, sc->rid, sc->res);
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device_set_desc(dev, "I2C bus controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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i2c_attach(device_t dev)
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{
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struct i2c_softc *sc;
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sc = device_get_softc(dev);
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sc->dev = dev;
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sc->rid = 0;
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mtx_init(&sc->mutex, device_get_nameunit(dev), "I2C", MTX_DEF);
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sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid,
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RF_ACTIVE);
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if (sc->res == NULL) {
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device_printf(dev, "could not allocate resources");
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mtx_destroy(&sc->mutex);
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return (ENXIO);
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}
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sc->bst = rman_get_bustag(sc->res);
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sc->bsh = rman_get_bushandle(sc->res);
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sc->iicbus = device_add_child(dev, "iicbus", -1);
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if (sc->iicbus == NULL) {
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device_printf(dev, "could not add iicbus child");
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mtx_destroy(&sc->mutex);
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return (ENXIO);
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}
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bus_generic_attach(dev);
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return (IIC_NOERR);
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}
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static int
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i2c_repeated_start(device_t dev, u_char slave, int timeout)
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{
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struct i2c_softc *sc;
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int error;
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sc = device_get_softc(dev);
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mtx_lock(&sc->mutex);
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/* Set repeated start condition */
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i2c_flag_set(sc, I2C_CONTROL_REG ,I2CCR_RSTA);
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/* Write target address - LSB is R/W bit */
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i2c_write_reg(sc, I2C_DATA_REG, slave);
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DELAY(1250);
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error = i2c_do_wait(dev, sc, 1, 1);
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mtx_unlock(&sc->mutex);
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if (error)
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return (error);
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return (IIC_NOERR);
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}
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static int
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i2c_start(device_t dev, u_char slave, int timeout)
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{
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struct i2c_softc *sc;
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uint8_t status;
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int error;
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sc = device_get_softc(dev);
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DELAY(1000);
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mtx_lock(&sc->mutex);
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status = i2c_read_reg(sc, I2C_STATUS_REG);
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/* Check if bus is idle or busy */
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if (status & I2CSR_MBB) {
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debugf("bus busy");
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mtx_unlock(&sc->mutex);
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i2c_stop(dev);
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return (IIC_EBUSBSY);
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}
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/* Set start condition */
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i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_MSTA | I2CCR_MTX);
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/* Write target address - LSB is R/W bit */
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i2c_write_reg(sc, I2C_DATA_REG, slave);
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DELAY(1250);
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error = i2c_do_wait(dev, sc, 1, 1);
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mtx_unlock(&sc->mutex);
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if (error)
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return (error);
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return (IIC_NOERR);
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}
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static int
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i2c_stop(device_t dev)
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{
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struct i2c_softc *sc;
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sc = device_get_softc(dev);
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mtx_lock(&sc->mutex);
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i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK);
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DELAY(1000);
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mtx_unlock(&sc->mutex);
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return (IIC_NOERR);
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}
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static int
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i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldadr)
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{
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struct i2c_softc *sc;
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uint8_t baud_rate;
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sc = device_get_softc(dev);
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switch (speed) {
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case IIC_FAST:
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baud_rate = I2C_BAUD_RATE_FAST;
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break;
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case IIC_SLOW:
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case IIC_UNKNOWN:
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case IIC_FASTEST:
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default:
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baud_rate = I2C_BAUD_RATE_DEF;
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break;
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}
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mtx_lock(&sc->mutex);
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i2c_write_reg(sc, I2C_CONTROL_REG, 0x0);
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i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
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DELAY(1000);
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i2c_write_reg(sc, I2C_FDR_REG, baud_rate);
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i2c_write_reg(sc, I2C_DFSRR_REG, I2C_DFSSR_DIV);
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i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE);
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DELAY(1000);
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mtx_unlock(&sc->mutex);
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return (IIC_NOERR);
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}
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static int
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i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay)
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{
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struct i2c_softc *sc;
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int error;
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sc = device_get_softc(dev);
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*read = 0;
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mtx_lock(&sc->mutex);
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if (len) {
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if (len == 1)
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i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
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I2CCR_MSTA | I2CCR_TXAK);
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else
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i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
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I2CCR_MSTA);
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/* dummy read */
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i2c_read_reg(sc, I2C_DATA_REG);
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DELAY(1000);
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}
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while (*read < len) {
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DELAY(1000);
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error = i2c_do_wait(dev, sc, 0, 0);
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if (error) {
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mtx_unlock(&sc->mutex);
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return (error);
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}
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if ((*read == len - 2) && last) {
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i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
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I2CCR_MSTA | I2CCR_TXAK);
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}
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if ((*read == len - 1) && last) {
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i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
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I2CCR_TXAK);
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}
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*buf++ = i2c_read_reg(sc, I2C_DATA_REG);
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(*read)++;
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DELAY(1250);
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}
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mtx_unlock(&sc->mutex);
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return (IIC_NOERR);
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}
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static int
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i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout)
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{
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struct i2c_softc *sc;
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int error;
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sc = device_get_softc(dev);
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*sent = 0;
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mtx_lock(&sc->mutex);
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while (*sent < len) {
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i2c_write_reg(sc, I2C_DATA_REG, *buf++);
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DELAY(1250);
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error = i2c_do_wait(dev, sc, 1, 0);
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if (error) {
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mtx_unlock(&sc->mutex);
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return (error);
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}
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(*sent)++;
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}
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mtx_unlock(&sc->mutex);
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return (IIC_NOERR);
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}
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