Add support for the SIIG Cyber 2S PCIe adapter. It is based on an

Oxford Semiconductor OX16PCI954 but uses only two ports with a non-default clock rate. PR: kern/152034 Tested by: Hans Fiedler hans of hermes louisville edu MFC after: 1 week
2011-05-19 11:41:12 +00:00 · 2011-05-19 11:41:12 +00:00 · 76caf7ac52
commit 76caf7ac52
parent 4633a79407
1 changed files with 6 additions and 0 deletions
--- a/sys/dev/puc/pucdata.c
+++ b/sys/dev/puc/pucdata.c
@ -656,6 +656,12 @@ const struct puc_cfg puc_pci_devices[] = {
 	    PUC_PORT_4S, 0x10, 0, 8,
 	},

+	{   0x1415, 0x950a, 0x131f, 0x2030,
+	    "SIIG Cyber 2S PCIe",
+	    DEFAULT_RCLK * 10,
+	    PUC_PORT_2S, 0x10, 0, 8,
+	},
+
 	{   0x1415, 0x950a, 0xffff, 0,
 	    "Oxford Semiconductor OX16PCI954 UARTs",
 	    DEFAULT_RCLK,