Sync driver with HEAD merging all revisions from 1.96 to 1.115. The most
markable changes are: o Suspend/resume methods. o Link state detection fixes. o Utilization of jumbo allocator and extended RX descriptors. o busdma(9) cleanup and support for big-endian architectures. o Improved checksum offloading support. o Reduced number of PCI register writes in bge_start(). o Counting RX/TX errors as input/output interface errors.
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glebius
parent
1aeaa0e0e4
commit
76d7ea24d4
1269
sys/dev/bge/if_bge.c
1269
sys/dev/bge/if_bge.c
File diff suppressed because it is too large
Load Diff
@ -207,14 +207,20 @@
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#define BGE_PCIMISCCTL_INDIRECT_ACCESS 0x00000080
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#define BGE_PCIMISCCTL_ASICREV 0xFFFF0000
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#define BGE_BIGENDIAN_INIT \
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(BGE_PCIMISCCTL_ENDIAN_BYTESWAP| \
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BGE_PCIMISCCTL_ENDIAN_WORDSWAP|BGE_PCIMISCCTL_CLEAR_INTA| \
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BGE_PCIMISCCTL_INDIRECT_ACCESS|BGE_PCIMISCCTL_MASK_PCI_INTR)
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#define BGE_HIF_SWAP_OPTIONS (BGE_PCIMISCCTL_ENDIAN_WORDSWAP)
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#if BYTE_ORDER == LITTLE_ENDIAN
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#define BGE_DMA_SWAP_OPTIONS \
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BGE_MODECTL_WORDSWAP_NONFRAME| \
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BGE_MODECTL_BYTESWAP_DATA|BGE_MODECTL_WORDSWAP_DATA
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#else
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#define BGE_DMA_SWAP_OPTIONS \
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BGE_MODECTL_WORDSWAP_NONFRAME|BGE_MODECTL_BYTESWAP_NONFRAME| \
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BGE_MODECTL_BYTESWAP_DATA|BGE_MODECTL_WORDSWAP_DATA
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#endif
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#define BGE_LITTLEENDIAN_INIT \
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(BGE_PCIMISCCTL_CLEAR_INTA|BGE_PCIMISCCTL_MASK_PCI_INTR| \
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BGE_PCIMISCCTL_ENDIAN_WORDSWAP|BGE_PCIMISCCTL_INDIRECT_ACCESS)
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#define BGE_INIT \
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(BGE_HIF_SWAP_OPTIONS|BGE_PCIMISCCTL_CLEAR_INTA| \
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BGE_PCIMISCCTL_MASK_PCI_INTR|BGE_PCIMISCCTL_INDIRECT_ACCESS)
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#define BGE_CHIPID_TIGON_I 0x40000000
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#define BGE_CHIPID_TIGON_II 0x60000000
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@ -1767,6 +1773,10 @@ struct bge_rcb {
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u_int32_t bge_maxlen_flags;
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u_int32_t bge_nicaddr;
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};
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#define RCB_WRITE_4(sc, rcb, offset, val) \
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bus_space_write_4(sc->bge_btag, sc->bge_bhandle, \
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rcb + offsetof(struct bge_rcb, offset), val)
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#define BGE_RCB_MAXLEN_FLAGS(maxlen, flags) ((maxlen) << 16 | (flags))
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#define BGE_RCB_FLAG_USE_EXT_RX_BD 0x0001
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@ -1774,10 +1784,17 @@ struct bge_rcb {
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struct bge_tx_bd {
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bge_hostaddr bge_addr;
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#if BYTE_ORDER == LITTLE_ENDIAN
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u_int16_t bge_flags;
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u_int16_t bge_len;
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u_int16_t bge_vlan_tag;
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u_int16_t bge_rsvd;
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#else
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u_int16_t bge_len;
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u_int16_t bge_flags;
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u_int16_t bge_rsvd;
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u_int16_t bge_vlan_tag;
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#endif
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};
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#define BGE_TXBDFLAG_TCP_UDP_CSUM 0x0001
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@ -1799,6 +1816,7 @@ struct bge_tx_bd {
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struct bge_rx_bd {
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bge_hostaddr bge_addr;
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#if BYTE_ORDER == LITTLE_ENDIAN
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u_int16_t bge_len;
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u_int16_t bge_idx;
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u_int16_t bge_flags;
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@ -1807,10 +1825,59 @@ struct bge_rx_bd {
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u_int16_t bge_ip_csum;
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u_int16_t bge_vlan_tag;
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u_int16_t bge_error_flag;
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#else
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u_int16_t bge_idx;
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u_int16_t bge_len;
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u_int16_t bge_type;
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u_int16_t bge_flags;
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u_int16_t bge_ip_csum;
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u_int16_t bge_tcp_udp_csum;
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u_int16_t bge_error_flag;
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u_int16_t bge_vlan_tag;
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#endif
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u_int32_t bge_rsvd;
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u_int32_t bge_opaque;
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};
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struct bge_extrx_bd {
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bge_hostaddr bge_addr1;
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bge_hostaddr bge_addr2;
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bge_hostaddr bge_addr3;
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#if BYTE_ORDER == LITTLE_ENDIAN
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u_int16_t bge_len2;
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u_int16_t bge_len1;
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u_int16_t bge_rsvd1;
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u_int16_t bge_len3;
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#else
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u_int16_t bge_len1;
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u_int16_t bge_len2;
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u_int16_t bge_len3;
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u_int16_t bge_rsvd1;
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#endif
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bge_hostaddr bge_addr0;
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#if BYTE_ORDER == LITTLE_ENDIAN
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u_int16_t bge_len0;
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u_int16_t bge_idx;
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u_int16_t bge_flags;
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u_int16_t bge_type;
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u_int16_t bge_tcp_udp_csum;
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u_int16_t bge_ip_csum;
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u_int16_t bge_vlan_tag;
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u_int16_t bge_error_flag;
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#else
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u_int16_t bge_idx;
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u_int16_t bge_len0;
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u_int16_t bge_type;
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u_int16_t bge_flags;
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u_int16_t bge_ip_csum;
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u_int16_t bge_tcp_udp_csum;
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u_int16_t bge_error_flag;
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u_int16_t bge_vlan_tag;
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#endif
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u_int32_t bge_rsvd0;
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u_int32_t bge_opaque;
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};
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#define BGE_RXBDFLAG_END 0x0004
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#define BGE_RXBDFLAG_JUMBO_RING 0x0020
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#define BGE_RXBDFLAG_VLAN_TAG 0x0040
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@ -1830,17 +1897,29 @@ struct bge_rx_bd {
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#define BGE_RXERRFLAG_GIANT 0x0080
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struct bge_sts_idx {
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#if BYTE_ORDER == LITTLE_ENDIAN
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u_int16_t bge_rx_prod_idx;
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u_int16_t bge_tx_cons_idx;
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#else
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u_int16_t bge_tx_cons_idx;
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u_int16_t bge_rx_prod_idx;
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#endif
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};
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struct bge_status_block {
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u_int32_t bge_status;
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u_int32_t bge_rsvd0;
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#if BYTE_ORDER == LITTLE_ENDIAN
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u_int16_t bge_rx_jumbo_cons_idx;
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u_int16_t bge_rx_std_cons_idx;
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u_int16_t bge_rx_mini_cons_idx;
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u_int16_t bge_rsvd1;
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#else
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u_int16_t bge_rx_std_cons_idx;
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u_int16_t bge_rx_jumbo_cons_idx;
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u_int16_t bge_rsvd1;
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u_int16_t bge_rx_mini_cons_idx;
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#endif
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struct bge_sts_idx bge_idx[16];
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};
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@ -2145,7 +2224,6 @@ struct bge_gib {
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#define BGE_MAX_FRAMELEN 1536
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#define BGE_JUMBO_FRAMELEN 9018
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#define BGE_JUMBO_MTU (BGE_JUMBO_FRAMELEN-ETHER_HDR_LEN-ETHER_CRC_LEN)
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#define BGE_PAGE_SIZE PAGE_SIZE
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#define BGE_MIN_FRAMELEN 60
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/*
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@ -2214,6 +2292,9 @@ struct vpd_key {
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#define BGE_RESID (BGE_JPAGESZ - (BGE_JLEN * BGE_JSLOTS) % BGE_JPAGESZ)
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#define BGE_JMEM ((BGE_JLEN * BGE_JSLOTS) + BGE_RESID)
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#define BGE_NSEG_JUMBO 4
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#define BGE_NSEG_NEW 32
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/*
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* Ring structures. Most of these reside in host memory and we tell
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* the NIC where they are via the ring control blocks. The exceptions
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@ -2224,7 +2305,7 @@ struct vpd_key {
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struct bge_ring_data {
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struct bge_rx_bd *bge_rx_std_ring;
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bus_addr_t bge_rx_std_ring_paddr;
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struct bge_rx_bd *bge_rx_jumbo_ring;
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struct bge_extrx_bd *bge_rx_jumbo_ring;
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bus_addr_t bge_rx_jumbo_ring_paddr;
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struct bge_rx_bd *bge_rx_return_ring;
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bus_addr_t bge_rx_return_ring_paddr;
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@ -2234,14 +2315,13 @@ struct bge_ring_data {
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bus_addr_t bge_status_block_paddr;
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struct bge_stats *bge_stats;
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bus_addr_t bge_stats_paddr;
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void *bge_jumbo_buf;
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struct bge_gib bge_info;
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};
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#define BGE_STD_RX_RING_SZ \
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(sizeof(struct bge_rx_bd) * BGE_STD_RX_RING_CNT)
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#define BGE_JUMBO_RX_RING_SZ \
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(sizeof(struct bge_rx_bd) * BGE_JUMBO_RX_RING_CNT)
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(sizeof(struct bge_extrx_bd) * BGE_JUMBO_RX_RING_CNT)
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#define BGE_TX_RING_SZ \
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(sizeof(struct bge_tx_bd) * BGE_TX_RING_CNT)
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#define BGE_RX_RTN_RING_SZ(x) \
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@ -2264,7 +2344,6 @@ struct bge_chain_data {
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bus_dma_tag_t bge_tx_ring_tag;
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bus_dma_tag_t bge_status_tag;
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bus_dma_tag_t bge_stats_tag;
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bus_dma_tag_t bge_jumbo_tag;
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bus_dma_tag_t bge_mtag; /* mbuf mapping tag */
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bus_dma_tag_t bge_mtag_jumbo; /* mbuf mapping tag */
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bus_dmamap_t bge_tx_dmamap[BGE_TX_RING_CNT];
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@ -2276,12 +2355,9 @@ struct bge_chain_data {
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bus_dmamap_t bge_rx_return_ring_map;
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bus_dmamap_t bge_status_map;
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bus_dmamap_t bge_stats_map;
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bus_dmamap_t bge_jumbo_map;
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struct mbuf *bge_tx_chain[BGE_TX_RING_CNT];
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struct mbuf *bge_rx_std_chain[BGE_STD_RX_RING_CNT];
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struct mbuf *bge_rx_jumbo_chain[BGE_JUMBO_RX_RING_CNT];
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/* Stick the jumbo mem management stuff here too. */
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caddr_t bge_jslots[BGE_JSLOTS];
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};
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struct bge_dmamap_arg {
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@ -2304,11 +2380,6 @@ struct bge_type {
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#define BGE_TIMEOUT 100000
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#define BGE_TXCONS_UNSET 0xFFFF /* impossible value */
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struct bge_jpool_entry {
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int slot;
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SLIST_ENTRY(bge_jpool_entry) jpool_entries;
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};
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struct bge_bcom_hack {
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int reg;
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int val;
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@ -2320,13 +2391,11 @@ struct bge_softc {
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struct mtx bge_mtx;
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device_t bge_miibus;
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bus_space_handle_t bge_bhandle;
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vm_offset_t bge_vhandle;
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bus_space_tag_t bge_btag;
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void *bge_intrhand;
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struct resource *bge_irq;
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struct resource *bge_res;
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struct ifmedia bge_ifmedia; /* TBI media info */
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u_int8_t bge_unit; /* interface number */
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u_int8_t bge_extram; /* has external SSRAM */
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u_int8_t bge_tbi;
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u_int8_t bge_rx_alignment_bug;
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@ -2343,11 +2412,10 @@ struct bge_softc {
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u_int16_t bge_return_ring_cnt;
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u_int16_t bge_std; /* current std ring head */
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u_int16_t bge_jumbo; /* current jumo ring head */
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SLIST_HEAD(__bge_jfreehead, bge_jpool_entry) bge_jfree_listhead;
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SLIST_HEAD(__bge_jinusehead, bge_jpool_entry) bge_jinuse_listhead;
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u_int32_t bge_stat_ticks;
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u_int32_t bge_rx_coal_ticks;
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u_int32_t bge_tx_coal_ticks;
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u_int32_t bge_tx_prodidx;
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u_int32_t bge_rx_max_coal_bds;
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u_int32_t bge_tx_max_coal_bds;
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u_int32_t bge_tx_buf_ratio;
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@ -2357,6 +2425,9 @@ struct bge_softc {
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struct callout bge_stat_ch;
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char *bge_vpd_prodname;
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char *bge_vpd_readonly;
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u_long bge_rx_discards;
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u_long bge_tx_discards;
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u_long bge_tx_collisions;
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#ifdef DEVICE_POLLING
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int rxcycles;
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#endif /* DEVICE_POLLING */
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