diff --git a/sys/arm64/rockchip/if_dwc_rk.c b/sys/arm64/rockchip/if_dwc_rk.c
index 1b597bfe6592..739feb67f61c 100644
--- a/sys/arm64/rockchip/if_dwc_rk.c
+++ b/sys/arm64/rockchip/if_dwc_rk.c
@@ -65,6 +65,13 @@ __FBSDID("$FreeBSD$");
 #define	RK3328_GRF_MACPHY_CON3		0x0B0C
 #define	RK3328_GRF_MACPHY_STATUS	0x0B10
 
+static struct ofw_compat_data compat_data[] = {
+	{"rockchip,rk3288-gmac", 1},
+	{"rockchip,rk3328-gmac", 1},
+	{"rockchip,rk3399-gmac", 1},
+	{NULL,			 0}
+};
+
 #ifdef notyet
 static void
 rk3328_set_delays(struct syscon *grf, phandle_t node)
@@ -117,8 +124,7 @@ if_dwc_rk_probe(device_t dev)
 
 	if (!ofw_bus_status_okay(dev))
 		return (ENXIO);
-	if (!(ofw_bus_is_compatible(dev, "rockchip,rk3328-gmac") ||
-	      ofw_bus_is_compatible(dev, "rockchip,rk3399-gmac")))
+	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
 		return (ENXIO);
 	device_set_desc(dev, "Rockchip Gigabit Ethernet Controller");
 
diff --git a/sys/arm64/rockchip/rk_gpio.c b/sys/arm64/rockchip/rk_gpio.c
index d8875add6720..bb9a63cd4b10 100644
--- a/sys/arm64/rockchip/rk_gpio.c
+++ b/sys/arm64/rockchip/rk_gpio.c
@@ -50,8 +50,6 @@ __FBSDID("$FreeBSD$");
 #include <dev/ofw/ofw_bus_subr.h>
 #include <dev/extres/clk/clk.h>
 
-#include "opt_soc.h"
-
 #include "gpio_if.h"
 
 #define	RK_GPIO_SWPORTA_DR	0x00	/* Data register */
@@ -196,6 +194,7 @@ rk_gpio_pin_max(device_t dev, int *maxpin)
 {
 
 	/* Each bank have always 32 pins */
+	/* XXX not true*/
 	*maxpin = 32;
 	return (0);
 }
@@ -225,6 +224,7 @@ rk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
 
 	sc = device_get_softc(dev);
 
+	/* XXX Combine this with parent (pinctrl) */
 	RK_GPIO_LOCK(sc);
 	reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DDR);
 	RK_GPIO_UNLOCK(sc);
@@ -242,6 +242,7 @@ rk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
 {
 
 	/* Caps are managed by the pinctrl device */
+	/* XXX Pass this to parent (pinctrl) */
 	*caps = 0;
 	return (0);
 }
@@ -254,6 +255,7 @@ rk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
 
 	sc = device_get_softc(dev);
 
+	/* XXX Combine this with parent (pinctrl) */
 	RK_GPIO_LOCK(sc);
 
 	reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DDR);
@@ -394,6 +396,14 @@ rk_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, int gcells,
 	return (0);
 }
 
+static phandle_t
+rk_gpio_get_node(device_t bus, device_t dev)
+{
+
+	/* We only have one child, the GPIO bus, which needs our own node. */
+	return (ofw_bus_get_node(bus));
+}
+
 static device_method_t rk_gpio_methods[] = {
 	/* Device interface */
 	DEVMETHOD(device_probe,		rk_gpio_probe),
@@ -414,6 +424,9 @@ static device_method_t rk_gpio_methods[] = {
 	DEVMETHOD(gpio_pin_config_32,	rk_gpio_pin_config_32),
 	DEVMETHOD(gpio_map_gpios,	rk_gpio_map_gpios),
 
+	/* ofw_bus interface */
+	DEVMETHOD(ofw_bus_get_node,	rk_gpio_get_node),
+
 	DEVMETHOD_END
 };
 
@@ -425,5 +438,10 @@ static driver_t rk_gpio_driver = {
 
 static devclass_t rk_gpio_devclass;
 
+/*
+ * GPIO driver is always a child of rk_pinctrl driver and should be probed
+ * and attached within rk_pinctrl_attach function. Due to this, bus pass order
+ * must be same as bus pass order of rk_pinctrl driver.
+ */
 EARLY_DRIVER_MODULE(rk_gpio, simplebus, rk_gpio_driver,
-    rk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
+    rk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
diff --git a/sys/arm64/rockchip/rk_grf.c b/sys/arm64/rockchip/rk_grf.c
index 44919144c209..24895ce974dc 100644
--- a/sys/arm64/rockchip/rk_grf.c
+++ b/sys/arm64/rockchip/rk_grf.c
@@ -44,16 +44,11 @@ __FBSDID("$FreeBSD$");
 #include <dev/extres/syscon/syscon.h>
 #include <dev/fdt/simple_mfd.h>
 
-#include "opt_soc.h"
-
 static struct ofw_compat_data compat_data[] = {
-#ifdef SOC_ROCKCHIP_RK3328
+	{"rockchip,rk3288-grf", 1},
 	{"rockchip,rk3328-grf", 1},
-#endif
-#ifdef SOC_ROCKCHIP_RK3399
 	{"rockchip,rk3399-grf", 1},
 	{"rockchip,rk3399-pmugrf", 1},
-#endif
 	{NULL,             0}
 };