MFC r257654, r257772, r258441, r258689, r258698, r258879, r259048, and
r259103. r257654: cxgbe(4): Exclude MPS_RPLC_MAP_CTL (0x11114) from the register dump. Turns out it's a write-only register with strange side effects on read. r257772: cxgbe(4): Tidy up the display for payload memory statistics (pm_stats). r258441: cxgbe(4): update the internal list of device features. r258689: Disable an assertion that relies on some code[1] that isn't in HEAD yet. r258698: cxgbetool: "modinfo" command to display SFP+ module information. r258879: cxgbe(4): T4_SET_SCHED_CLASS and T4_SET_SCHED_QUEUE ioctls to program scheduling classes in the chip and to bind tx queue(s) to a scheduling class respectively. These can be used for various kinds of tx traffic throttling (to force selected tx queues to drain at a fixed Kbps rate, or a % of the port's total bandwidth, or at a fixed pps rate, etc.). r259048: Two new cxgbetool subcommands to set up scheduler classes and to bind them to NIC queues. r259103: cxgbe(4): save a copy of the RSS map for each port for the driver's use.
This commit is contained in:
np
parent
44822de64a
commit
7777b8aff6
@ -194,6 +194,7 @@ struct port_info {
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unsigned long flags;
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int if_flags;
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uint16_t *rss;
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uint16_t viid;
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int16_t xact_addr_filt;/* index of exact MAC address filter */
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uint16_t rss_size; /* size of VI's RSS table slice */
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@ -587,4 +587,8 @@ int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, enum ctxt_type cty
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int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox);
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int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);
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int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, u32 addr, u32 val);
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int t4_sched_config(struct adapter *adapter, int type, int minmaxen);
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int t4_sched_params(struct adapter *adapter, int type, int level, int mode,
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int rateunit, int ratemode, int channel, int cl,
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int minrate, int maxrate, int weight, int pktsize);
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#endif /* __CHELSIO_COMMON_H */
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@ -5661,3 +5661,50 @@ int __devinit t4_port_init(struct port_info *p, int mbox, int pf, int vf)
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return 0;
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}
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int t4_sched_config(struct adapter *adapter, int type, int minmaxen)
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{
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struct fw_sched_cmd cmd;
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memset(&cmd, 0, sizeof(cmd));
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cmd.op_to_write = cpu_to_be32(V_FW_CMD_OP(FW_SCHED_CMD) |
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F_FW_CMD_REQUEST |
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F_FW_CMD_WRITE);
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cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));
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cmd.u.config.sc = FW_SCHED_SC_CONFIG;
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cmd.u.config.type = type;
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cmd.u.config.minmaxen = minmaxen;
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return t4_wr_mbox_meat(adapter,adapter->mbox, &cmd, sizeof(cmd),
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NULL, 1);
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}
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int t4_sched_params(struct adapter *adapter, int type, int level, int mode,
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int rateunit, int ratemode, int channel, int cl,
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int minrate, int maxrate, int weight, int pktsize)
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{
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struct fw_sched_cmd cmd;
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memset(&cmd, 0, sizeof(cmd));
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cmd.op_to_write = cpu_to_be32(V_FW_CMD_OP(FW_SCHED_CMD) |
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F_FW_CMD_REQUEST |
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F_FW_CMD_WRITE);
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cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));
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cmd.u.params.sc = FW_SCHED_SC_PARAMS;
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cmd.u.params.type = type;
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cmd.u.params.level = level;
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cmd.u.params.mode = mode;
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cmd.u.params.ch = channel;
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cmd.u.params.cl = cl;
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cmd.u.params.unit = rateunit;
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cmd.u.params.rate = ratemode;
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cmd.u.params.min = cpu_to_be32(minrate);
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cmd.u.params.max = cpu_to_be32(maxrate);
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cmd.u.params.weight = cpu_to_be16(weight);
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cmd.u.params.pktsize = cpu_to_be16(pktsize);
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return t4_wr_mbox_meat(adapter,adapter->mbox, &cmd, sizeof(cmd),
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NULL, 1);
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}
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@ -208,6 +208,74 @@ struct t4_filter {
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struct t4_filter_specification fs;
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};
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/*
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* Support for "sched-class" command to allow a TX Scheduling Class to be
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* programmed with various parameters.
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*/
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struct t4_sched_params {
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int8_t subcmd; /* sub-command */
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int8_t type; /* packet or flow */
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union {
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struct { /* sub-command SCHED_CLASS_CONFIG */
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int8_t minmax; /* minmax enable */
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} config;
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struct { /* sub-command SCHED_CLASS_PARAMS */
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int8_t level; /* scheduler hierarchy level */
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int8_t mode; /* per-class or per-flow */
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int8_t rateunit; /* bit or packet rate */
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int8_t ratemode; /* %port relative or kbps
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absolute */
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int8_t channel; /* scheduler channel [0..N] */
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int8_t cl; /* scheduler class [0..N] */
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int32_t minrate; /* minimum rate */
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int32_t maxrate; /* maximum rate */
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int16_t weight; /* percent weight */
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int16_t pktsize; /* average packet size */
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} params;
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uint8_t reserved[6 + 8 * 8];
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} u;
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};
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enum {
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SCHED_CLASS_SUBCMD_CONFIG, /* config sub-command */
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SCHED_CLASS_SUBCMD_PARAMS, /* params sub-command */
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};
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enum {
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SCHED_CLASS_TYPE_PACKET,
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};
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enum {
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SCHED_CLASS_LEVEL_CL_RL, /* class rate limiter */
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SCHED_CLASS_LEVEL_CL_WRR, /* class weighted round robin */
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SCHED_CLASS_LEVEL_CH_RL, /* channel rate limiter */
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};
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enum {
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SCHED_CLASS_MODE_CLASS, /* per-class scheduling */
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SCHED_CLASS_MODE_FLOW, /* per-flow scheduling */
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};
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enum {
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SCHED_CLASS_RATEUNIT_BITS, /* bit rate scheduling */
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SCHED_CLASS_RATEUNIT_PKTS, /* packet rate scheduling */
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};
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enum {
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SCHED_CLASS_RATEMODE_REL, /* percent of port bandwidth */
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SCHED_CLASS_RATEMODE_ABS, /* Kb/s */
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};
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/*
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* Support for "sched_queue" command to allow one or more NIC TX Queues to be
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* bound to a TX Scheduling Class.
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*/
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struct t4_sched_queue {
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uint8_t port;
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int8_t queue; /* queue index; -1 => all queues */
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int8_t cl; /* class index; -1 => unbind */
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};
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#define T4_SGE_CONTEXT_SIZE 24
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enum {
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SGE_CONTEXT_EGRESS,
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@ -261,6 +329,10 @@ struct t4_tracer {
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#define CHELSIO_T4_GET_MEM _IOW('f', T4_GET_MEM, struct t4_mem_range)
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#define CHELSIO_T4_GET_I2C _IOWR('f', T4_GET_I2C, struct t4_i2c_data)
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#define CHELSIO_T4_CLEAR_STATS _IOW('f', T4_CLEAR_STATS, uint32_t)
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#define CHELSIO_T4_SCHED_CLASS _IOW('f', T4_SET_SCHED_CLASS, \
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struct t4_sched_params)
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#define CHELSIO_T4_SCHED_QUEUE _IOW('f', T4_SET_SCHED_QUEUE, \
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struct t4_sched_queue)
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#define CHELSIO_T4_GET_TRACER _IOWR('f', T4_GET_TRACER, struct t4_tracer)
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#define CHELSIO_T4_SET_TRACER _IOW('f', T4_SET_TRACER, struct t4_tracer)
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#endif
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@ -425,6 +425,8 @@ static int get_sge_context(struct adapter *, struct t4_sge_context *);
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static int load_fw(struct adapter *, struct t4_data *);
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static int read_card_mem(struct adapter *, int, struct t4_mem_range *);
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static int read_i2c(struct adapter *, struct t4_i2c_data *);
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static int set_sched_class(struct adapter *, struct t4_sched_params *);
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static int set_sched_queue(struct adapter *, struct t4_sched_queue *);
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#ifdef TCP_OFFLOAD
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static int toe_capability(struct port_info *, int);
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#endif
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@ -3155,7 +3157,7 @@ port_full_init(struct port_info *pi)
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struct ifnet *ifp = pi->ifp;
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uint16_t *rss;
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struct sge_rxq *rxq;
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int rc, i;
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int rc, i, j;
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ASSERT_SYNCHRONIZED_OP(sc);
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KASSERT((pi->flags & PORT_INIT_DONE) == 0,
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@ -3172,21 +3174,25 @@ port_full_init(struct port_info *pi)
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goto done; /* error message displayed already */
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/*
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* Setup RSS for this port.
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* Setup RSS for this port. Save a copy of the RSS table for later use.
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*/
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rss = malloc(pi->nrxq * sizeof (*rss), M_CXGBE,
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M_ZERO | M_WAITOK);
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for_each_rxq(pi, i, rxq) {
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rss[i] = rxq->iq.abs_id;
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rss = malloc(pi->rss_size * sizeof (*rss), M_CXGBE, M_ZERO | M_WAITOK);
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for (i = 0; i < pi->rss_size;) {
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for_each_rxq(pi, j, rxq) {
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rss[i++] = rxq->iq.abs_id;
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if (i == pi->rss_size)
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break;
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}
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}
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rc = -t4_config_rss_range(sc, sc->mbox, pi->viid, 0,
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pi->rss_size, rss, pi->nrxq);
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free(rss, M_CXGBE);
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rc = -t4_config_rss_range(sc, sc->mbox, pi->viid, 0, pi->rss_size, rss,
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pi->rss_size);
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if (rc != 0) {
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if_printf(ifp, "rss_config failed: %d\n", rc);
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goto done;
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}
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pi->rss = rss;
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pi->flags |= PORT_INIT_DONE;
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done:
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if (rc != 0)
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@ -3235,6 +3241,7 @@ port_full_uninit(struct port_info *pi)
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quiesce_fl(sc, &ofld_rxq->fl);
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}
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#endif
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free(pi->rss, M_CXGBE);
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}
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t4_teardown_port_queues(pi);
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@ -3401,7 +3408,8 @@ t4_get_regs(struct adapter *sc, struct t4_regdump *regs, uint8_t *buf)
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0xd004, 0xd03c,
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0xdfc0, 0xdfe0,
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0xe000, 0xea7c,
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0xf000, 0x11190,
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0xf000, 0x11110,
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0x11118, 0x11190,
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0x19040, 0x1906c,
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0x19078, 0x19080,
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0x1908c, 0x19124,
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@ -3607,7 +3615,8 @@ t4_get_regs(struct adapter *sc, struct t4_regdump *regs, uint8_t *buf)
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0xd004, 0xd03c,
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0xdfc0, 0xdfe0,
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0xe000, 0x11088,
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0x1109c, 0x1117c,
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0x1109c, 0x11110,
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0x11118, 0x1117c,
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0x11190, 0x11204,
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0x19040, 0x1906c,
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0x19078, 0x19080,
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@ -4165,13 +4174,15 @@ t4_sysctls(struct adapter *sc)
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struct sysctl_oid_list *children, *c0;
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static char *caps[] = {
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"\20\1PPP\2QFC\3DCBX", /* caps[0] linkcaps */
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"\20\1NIC\2VM\3IDS\4UM\5UM_ISGL", /* caps[1] niccaps */
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"\20\1NIC\2VM\3IDS\4UM\5UM_ISGL" /* caps[1] niccaps */
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"\6HASHFILTER\7ETHOFLD",
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"\20\1TOE", /* caps[2] toecaps */
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"\20\1RDDP\2RDMAC", /* caps[3] rdmacaps */
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"\20\1INITIATOR_PDU\2TARGET_PDU" /* caps[4] iscsicaps */
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"\3INITIATOR_CNXOFLD\4TARGET_CNXOFLD"
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"\5INITIATOR_SSNOFLD\6TARGET_SSNOFLD",
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"\20\1INITIATOR\2TARGET\3CTRL_OFLD" /* caps[5] fcoecaps */
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"\4PO_INITIAOR\5PO_TARGET"
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};
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static char *doorbells = {"\20\1UDB\2WCWR\3UDBWC\4KDB"};
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@ -5953,10 +5964,13 @@ sysctl_pm_stats(SYSCTL_HANDLER_ARGS)
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struct adapter *sc = arg1;
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struct sbuf *sb;
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int rc, i;
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uint32_t tx_cnt[PM_NSTATS], rx_cnt[PM_NSTATS];
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uint64_t tx_cyc[PM_NSTATS], rx_cyc[PM_NSTATS];
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static const char *pm_stats[] = {
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"Read:", "Write bypass:", "Write mem:", "Flush:", "FIFO wait:"
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uint32_t cnt[PM_NSTATS];
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uint64_t cyc[PM_NSTATS];
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static const char *rx_stats[] = {
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"Read:", "Write bypass:", "Write mem:", "Flush:"
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};
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static const char *tx_stats[] = {
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"Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
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};
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rc = sysctl_wire_old_buffer(req, 0);
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@ -5967,14 +5981,17 @@ sysctl_pm_stats(SYSCTL_HANDLER_ARGS)
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if (sb == NULL)
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return (ENOMEM);
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t4_pmtx_get_stats(sc, tx_cnt, tx_cyc);
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t4_pmrx_get_stats(sc, rx_cnt, rx_cyc);
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t4_pmtx_get_stats(sc, cnt, cyc);
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sbuf_printf(sb, " Tx pcmds Tx bytes");
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for (i = 0; i < ARRAY_SIZE(tx_stats); i++)
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sbuf_printf(sb, "\n%-13s %10u %20ju", tx_stats[i], cnt[i],
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cyc[i]);
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sbuf_printf(sb, " Tx count Tx cycles "
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"Rx count Rx cycles");
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for (i = 0; i < PM_NSTATS; i++)
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sbuf_printf(sb, "\n%-13s %10u %20ju %10u %20ju",
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pm_stats[i], tx_cnt[i], tx_cyc[i], rx_cnt[i], rx_cyc[i]);
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t4_pmrx_get_stats(sc, cnt, cyc);
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sbuf_printf(sb, "\n Rx pcmds Rx bytes");
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for (i = 0; i < ARRAY_SIZE(rx_stats); i++)
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sbuf_printf(sb, "\n%-13s %10u %20ju", rx_stats[i], cnt[i],
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cyc[i]);
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rc = sbuf_finish(sb);
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sbuf_delete(sb);
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@ -7285,6 +7302,228 @@ read_i2c(struct adapter *sc, struct t4_i2c_data *i2cd)
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return (rc);
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}
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static int
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in_range(int val, int lo, int hi)
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{
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return (val < 0 || (val <= hi && val >= lo));
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}
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static int
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set_sched_class(struct adapter *sc, struct t4_sched_params *p)
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{
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int fw_subcmd, fw_type, rc;
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rc = begin_synchronized_op(sc, NULL, SLEEP_OK | INTR_OK, "t4setsc");
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if (rc)
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return (rc);
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if (!(sc->flags & FULL_INIT_DONE)) {
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rc = EAGAIN;
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goto done;
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}
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/*
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* Translate the cxgbetool parameters into T4 firmware parameters. (The
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* sub-command and type are in common locations.)
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*/
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if (p->subcmd == SCHED_CLASS_SUBCMD_CONFIG)
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fw_subcmd = FW_SCHED_SC_CONFIG;
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else if (p->subcmd == SCHED_CLASS_SUBCMD_PARAMS)
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fw_subcmd = FW_SCHED_SC_PARAMS;
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else {
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rc = EINVAL;
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goto done;
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}
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if (p->type == SCHED_CLASS_TYPE_PACKET)
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fw_type = FW_SCHED_TYPE_PKTSCHED;
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else {
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rc = EINVAL;
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goto done;
|
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}
|
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|
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if (fw_subcmd == FW_SCHED_SC_CONFIG) {
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/* Vet our parameters ..*/
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if (p->u.config.minmax < 0) {
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rc = EINVAL;
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goto done;
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}
|
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|
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/* And pass the request to the firmware ...*/
|
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rc = -t4_sched_config(sc, fw_type, p->u.config.minmax);
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goto done;
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}
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|
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if (fw_subcmd == FW_SCHED_SC_PARAMS) {
|
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int fw_level;
|
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int fw_mode;
|
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int fw_rateunit;
|
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int fw_ratemode;
|
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|
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if (p->u.params.level == SCHED_CLASS_LEVEL_CL_RL)
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fw_level = FW_SCHED_PARAMS_LEVEL_CL_RL;
|
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else if (p->u.params.level == SCHED_CLASS_LEVEL_CL_WRR)
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fw_level = FW_SCHED_PARAMS_LEVEL_CL_WRR;
|
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else if (p->u.params.level == SCHED_CLASS_LEVEL_CH_RL)
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fw_level = FW_SCHED_PARAMS_LEVEL_CH_RL;
|
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else {
|
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rc = EINVAL;
|
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goto done;
|
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}
|
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|
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if (p->u.params.mode == SCHED_CLASS_MODE_CLASS)
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fw_mode = FW_SCHED_PARAMS_MODE_CLASS;
|
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else if (p->u.params.mode == SCHED_CLASS_MODE_FLOW)
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fw_mode = FW_SCHED_PARAMS_MODE_FLOW;
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else {
|
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rc = EINVAL;
|
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goto done;
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}
|
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|
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if (p->u.params.rateunit == SCHED_CLASS_RATEUNIT_BITS)
|
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fw_rateunit = FW_SCHED_PARAMS_UNIT_BITRATE;
|
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else if (p->u.params.rateunit == SCHED_CLASS_RATEUNIT_PKTS)
|
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fw_rateunit = FW_SCHED_PARAMS_UNIT_PKTRATE;
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else {
|
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rc = EINVAL;
|
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goto done;
|
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}
|
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|
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if (p->u.params.ratemode == SCHED_CLASS_RATEMODE_REL)
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fw_ratemode = FW_SCHED_PARAMS_RATE_REL;
|
||||
else if (p->u.params.ratemode == SCHED_CLASS_RATEMODE_ABS)
|
||||
fw_ratemode = FW_SCHED_PARAMS_RATE_ABS;
|
||||
else {
|
||||
rc = EINVAL;
|
||||
goto done;
|
||||
}
|
||||
|
||||
/* Vet our parameters ... */
|
||||
if (!in_range(p->u.params.channel, 0, 3) ||
|
||||
!in_range(p->u.params.cl, 0, is_t4(sc) ? 15 : 16) ||
|
||||
!in_range(p->u.params.minrate, 0, 10000000) ||
|
||||
!in_range(p->u.params.maxrate, 0, 10000000) ||
|
||||
!in_range(p->u.params.weight, 0, 100)) {
|
||||
rc = ERANGE;
|
||||
goto done;
|
||||
}
|
||||
|
||||
/*
|
||||
* Translate any unset parameters into the firmware's
|
||||
* nomenclature and/or fail the call if the parameters
|
||||
* are required ...
|
||||
*/
|
||||
if (p->u.params.rateunit < 0 || p->u.params.ratemode < 0 ||
|
||||
p->u.params.channel < 0 || p->u.params.cl < 0) {
|
||||
rc = EINVAL;
|
||||
goto done;
|
||||
}
|
||||
if (p->u.params.minrate < 0)
|
||||
p->u.params.minrate = 0;
|
||||
if (p->u.params.maxrate < 0) {
|
||||
if (p->u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
|
||||
p->u.params.level == SCHED_CLASS_LEVEL_CH_RL) {
|
||||
rc = EINVAL;
|
||||
goto done;
|
||||
} else
|
||||
p->u.params.maxrate = 0;
|
||||
}
|
||||
if (p->u.params.weight < 0) {
|
||||
if (p->u.params.level == SCHED_CLASS_LEVEL_CL_WRR) {
|
||||
rc = EINVAL;
|
||||
goto done;
|
||||
} else
|
||||
p->u.params.weight = 0;
|
||||
}
|
||||
if (p->u.params.pktsize < 0) {
|
||||
if (p->u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
|
||||
p->u.params.level == SCHED_CLASS_LEVEL_CH_RL) {
|
||||
rc = EINVAL;
|
||||
goto done;
|
||||
} else
|
||||
p->u.params.pktsize = 0;
|
||||
}
|
||||
|
||||
/* See what the firmware thinks of the request ... */
|
||||
rc = -t4_sched_params(sc, fw_type, fw_level, fw_mode,
|
||||
fw_rateunit, fw_ratemode, p->u.params.channel,
|
||||
p->u.params.cl, p->u.params.minrate, p->u.params.maxrate,
|
||||
p->u.params.weight, p->u.params.pktsize);
|
||||
goto done;
|
||||
}
|
||||
|
||||
rc = EINVAL;
|
||||
done:
|
||||
end_synchronized_op(sc, 0);
|
||||
return (rc);
|
||||
}
|
||||
|
||||
static int
|
||||
set_sched_queue(struct adapter *sc, struct t4_sched_queue *p)
|
||||
{
|
||||
struct port_info *pi = NULL;
|
||||
struct sge_txq *txq;
|
||||
uint32_t fw_mnem, fw_queue, fw_class;
|
||||
int i, rc;
|
||||
|
||||
rc = begin_synchronized_op(sc, NULL, SLEEP_OK | INTR_OK, "t4setsq");
|
||||
if (rc)
|
||||
return (rc);
|
||||
|
||||
if (!(sc->flags & FULL_INIT_DONE)) {
|
||||
rc = EAGAIN;
|
||||
goto done;
|
||||
}
|
||||
|
||||
if (p->port >= sc->params.nports) {
|
||||
rc = EINVAL;
|
||||
goto done;
|
||||
}
|
||||
|
||||
pi = sc->port[p->port];
|
||||
if (!in_range(p->queue, 0, pi->ntxq - 1) || !in_range(p->cl, 0, 7)) {
|
||||
rc = EINVAL;
|
||||
goto done;
|
||||
}
|
||||
|
||||
/*
|
||||
* Create a template for the FW_PARAMS_CMD mnemonic and value (TX
|
||||
* Scheduling Class in this case).
|
||||
*/
|
||||
fw_mnem = (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) |
|
||||
V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_EQ_SCHEDCLASS_ETH));
|
||||
fw_class = p->cl < 0 ? 0xffffffff : p->cl;
|
||||
|
||||
/*
|
||||
* If op.queue is non-negative, then we're only changing the scheduling
|
||||
* on a single specified TX queue.
|
||||
*/
|
||||
if (p->queue >= 0) {
|
||||
txq = &sc->sge.txq[pi->first_txq + p->queue];
|
||||
fw_queue = (fw_mnem | V_FW_PARAMS_PARAM_YZ(txq->eq.cntxt_id));
|
||||
rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, &fw_queue,
|
||||
&fw_class);
|
||||
goto done;
|
||||
}
|
||||
|
||||
/*
|
||||
* Change the scheduling on all the TX queues for the
|
||||
* interface.
|
||||
*/
|
||||
for_each_txq(pi, i, txq) {
|
||||
fw_queue = (fw_mnem | V_FW_PARAMS_PARAM_YZ(txq->eq.cntxt_id));
|
||||
rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, &fw_queue,
|
||||
&fw_class);
|
||||
if (rc)
|
||||
goto done;
|
||||
}
|
||||
|
||||
rc = 0;
|
||||
done:
|
||||
end_synchronized_op(sc, 0);
|
||||
return (rc);
|
||||
}
|
||||
|
||||
int
|
||||
t4_os_find_pci_capability(struct adapter *sc, int cap)
|
||||
{
|
||||
@ -7528,6 +7767,12 @@ t4_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag,
|
||||
}
|
||||
break;
|
||||
}
|
||||
case CHELSIO_T4_SCHED_CLASS:
|
||||
rc = set_sched_class(sc, (struct t4_sched_params *)data);
|
||||
break;
|
||||
case CHELSIO_T4_SCHED_QUEUE:
|
||||
rc = set_sched_queue(sc, (struct t4_sched_queue *)data);
|
||||
break;
|
||||
case CHELSIO_T4_GET_TRACER:
|
||||
rc = t4_get_tracer(sc, (struct t4_tracer *)data);
|
||||
break;
|
||||
|
||||
@ -1391,7 +1391,7 @@ rxb_free(struct mbuf *m, void *arg1, void *arg2)
|
||||
{
|
||||
uma_zone_t zone = arg1;
|
||||
caddr_t cl = arg2;
|
||||
#ifdef INVARIANTS
|
||||
#ifdef notyet
|
||||
u_int refcount;
|
||||
|
||||
refcount = *find_buf_refcnt(cl);
|
||||
@ -1677,7 +1677,7 @@ t4_eth_rx(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m0)
|
||||
|
||||
m0->m_pkthdr.rcvif = ifp;
|
||||
m0->m_flags |= M_FLOWID;
|
||||
m0->m_pkthdr.flowid = rss->hash_val;
|
||||
m0->m_pkthdr.flowid = be32toh(rss->hash_val);
|
||||
|
||||
if (cpl->csum_calc && !cpl->err_vec) {
|
||||
if (ifp->if_capenable & IFCAP_RXCSUM &&
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
PROG= cxgbetool
|
||||
SRCS= cxgbetool.c
|
||||
NO_MAN=
|
||||
CFLAGS+= -I${.CURDIR}/../../../sys/dev/cxgbe -I.
|
||||
CFLAGS+= -I${.CURDIR}/../../../sys/dev/cxgbe -I${.CURDIR}/../../../sys -I.
|
||||
BINDIR?= /usr/sbin
|
||||
|
||||
.include <bsd.prog.mk>
|
||||
|
||||
@ -46,11 +46,12 @@ __FBSDID("$FreeBSD$");
|
||||
#include <net/ethernet.h>
|
||||
#include <netinet/in.h>
|
||||
#include <arpa/inet.h>
|
||||
#include <net/sff8472.h>
|
||||
|
||||
#include "t4_ioctl.h"
|
||||
|
||||
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
|
||||
|
||||
#define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo))
|
||||
#define max(x, y) ((x) > (y) ? (x) : (y))
|
||||
|
||||
static const char *progname, *nexus;
|
||||
@ -94,12 +95,15 @@ usage(FILE *fp)
|
||||
"\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n"
|
||||
"\tloadfw <fw-image.bin> install firmware\n"
|
||||
"\tmemdump <addr> <len> dump a memory range\n"
|
||||
"\tmodinfo <port> optics/cable information\n"
|
||||
"\treg <address>[=<val>] read/write register\n"
|
||||
"\treg64 <address>[=<val>] read/write 64 bit register\n"
|
||||
"\tregdump [<module>] ... dump registers\n"
|
||||
"\tsched-class params <param> <val> .. configure TX scheduler class\n"
|
||||
"\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n"
|
||||
"\tstdio interactive mode\n"
|
||||
"\ttcb <tid> read TCB\n"
|
||||
"\ttracer <idx> tx<n>|rx<n> set and enable a tracer)\n"
|
||||
"\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n"
|
||||
"\ttracer <idx> disable|enable disable or enable a tracer\n"
|
||||
"\ttracer list list all tracers\n"
|
||||
);
|
||||
@ -321,7 +325,7 @@ dump_regs_t4(int argc, const char *argv[], const uint32_t *regs)
|
||||
T4_MODREGS(ma),
|
||||
{ "edc0", t4_edc_0_regs },
|
||||
{ "edc1", t4_edc_1_regs },
|
||||
T4_MODREGS(cim),
|
||||
T4_MODREGS(cim),
|
||||
T4_MODREGS(tp),
|
||||
T4_MODREGS(ulp_rx),
|
||||
T4_MODREGS(ulp_tx),
|
||||
@ -333,7 +337,7 @@ dump_regs_t4(int argc, const char *argv[], const uint32_t *regs)
|
||||
{ "i2c", t4_i2cm_regs },
|
||||
T4_MODREGS(mi),
|
||||
T4_MODREGS(uart),
|
||||
T4_MODREGS(pmu),
|
||||
T4_MODREGS(pmu),
|
||||
T4_MODREGS(sf),
|
||||
T4_MODREGS(pl),
|
||||
T4_MODREGS(le),
|
||||
@ -1868,6 +1872,420 @@ tracer_cmd(int argc, const char *argv[])
|
||||
return set_tracer(idx, argc - 1, argv + 1);
|
||||
}
|
||||
|
||||
static int
|
||||
modinfo(int argc, const char *argv[])
|
||||
{
|
||||
long port;
|
||||
char string[16], *p;
|
||||
struct t4_i2c_data i2cd;
|
||||
int rc, i;
|
||||
uint16_t temp, vcc, tx_bias, tx_power, rx_power;
|
||||
|
||||
if (argc != 1) {
|
||||
warnx("must supply a port");
|
||||
return (EINVAL);
|
||||
}
|
||||
|
||||
p = str_to_number(argv[0], &port, NULL);
|
||||
if (*p || port > UCHAR_MAX) {
|
||||
warnx("invalid port id \"%s\"", argv[0]);
|
||||
return (EINVAL);
|
||||
}
|
||||
|
||||
bzero(&i2cd, sizeof(i2cd));
|
||||
i2cd.len = 1;
|
||||
i2cd.port_id = port;
|
||||
i2cd.dev_addr = SFF_8472_BASE;
|
||||
|
||||
i2cd.offset = SFF_8472_ID;
|
||||
if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
|
||||
goto fail;
|
||||
|
||||
if (i2cd.data[0] > SFF_8472_ID_LAST)
|
||||
printf("Unknown ID\n");
|
||||
else
|
||||
printf("ID: %s\n", sff_8472_id[i2cd.data[0]]);
|
||||
|
||||
bzero(&string, sizeof(string));
|
||||
for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) {
|
||||
i2cd.offset = i;
|
||||
if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
|
||||
goto fail;
|
||||
string[i - SFF_8472_VENDOR_START] = i2cd.data[0];
|
||||
}
|
||||
printf("Vendor %s\n", string);
|
||||
|
||||
bzero(&string, sizeof(string));
|
||||
for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) {
|
||||
i2cd.offset = i;
|
||||
if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
|
||||
goto fail;
|
||||
string[i - SFF_8472_SN_START] = i2cd.data[0];
|
||||
}
|
||||
printf("SN %s\n", string);
|
||||
|
||||
bzero(&string, sizeof(string));
|
||||
for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) {
|
||||
i2cd.offset = i;
|
||||
if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
|
||||
goto fail;
|
||||
string[i - SFF_8472_PN_START] = i2cd.data[0];
|
||||
}
|
||||
printf("PN %s\n", string);
|
||||
|
||||
bzero(&string, sizeof(string));
|
||||
for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) {
|
||||
i2cd.offset = i;
|
||||
if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
|
||||
goto fail;
|
||||
string[i - SFF_8472_REV_START] = i2cd.data[0];
|
||||
}
|
||||
printf("Rev %s\n", string);
|
||||
|
||||
i2cd.offset = SFF_8472_DIAG_TYPE;
|
||||
if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
|
||||
goto fail;
|
||||
|
||||
if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL |
|
||||
SFF_8472_DIAG_INTERNAL)) {
|
||||
|
||||
/* Switch to reading from the Diagnostic address. */
|
||||
i2cd.dev_addr = SFF_8472_DIAG;
|
||||
i2cd.len = 1;
|
||||
|
||||
i2cd.offset = SFF_8472_TEMP;
|
||||
if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
|
||||
goto fail;
|
||||
temp = i2cd.data[0] << 8;
|
||||
printf("Temp: ");
|
||||
if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN)
|
||||
printf("-");
|
||||
else
|
||||
printf("+");
|
||||
printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >>
|
||||
SFF_8472_TEMP_SHIFT);
|
||||
|
||||
i2cd.offset = SFF_8472_VCC;
|
||||
if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
|
||||
goto fail;
|
||||
vcc = i2cd.data[0] << 8;
|
||||
printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR);
|
||||
|
||||
i2cd.offset = SFF_8472_TX_BIAS;
|
||||
if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
|
||||
goto fail;
|
||||
tx_bias = i2cd.data[0] << 8;
|
||||
printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR);
|
||||
|
||||
i2cd.offset = SFF_8472_TX_POWER;
|
||||
if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
|
||||
goto fail;
|
||||
tx_power = i2cd.data[0] << 8;
|
||||
printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR);
|
||||
|
||||
i2cd.offset = SFF_8472_RX_POWER;
|
||||
if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
|
||||
goto fail;
|
||||
rx_power = i2cd.data[0] << 8;
|
||||
printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR);
|
||||
|
||||
} else
|
||||
printf("Diagnostics not supported.\n");
|
||||
|
||||
return(0);
|
||||
|
||||
fail:
|
||||
if (rc == EPERM)
|
||||
warnx("No module/cable in port %ld", port);
|
||||
return (rc);
|
||||
|
||||
}
|
||||
|
||||
/* XXX: pass in a low/high and do range checks as well */
|
||||
static int
|
||||
get_sched_param(const char *param, const char *args[], long *val)
|
||||
{
|
||||
char *p;
|
||||
|
||||
if (strcmp(param, args[0]) != 0)
|
||||
return (EINVAL);
|
||||
|
||||
p = str_to_number(args[1], val, NULL);
|
||||
if (*p) {
|
||||
warnx("parameter \"%s\" has bad value \"%s\"", args[0],
|
||||
args[1]);
|
||||
return (EINVAL);
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
sched_class(int argc, const char *argv[])
|
||||
{
|
||||
struct t4_sched_params op;
|
||||
int errs, i;
|
||||
|
||||
memset(&op, 0xff, sizeof(op));
|
||||
op.subcmd = -1;
|
||||
op.type = -1;
|
||||
if (argc == 0) {
|
||||
warnx("missing scheduling sub-command");
|
||||
return (EINVAL);
|
||||
}
|
||||
if (!strcmp(argv[0], "config")) {
|
||||
op.subcmd = SCHED_CLASS_SUBCMD_CONFIG;
|
||||
op.u.config.minmax = -1;
|
||||
} else if (!strcmp(argv[0], "params")) {
|
||||
op.subcmd = SCHED_CLASS_SUBCMD_PARAMS;
|
||||
op.u.params.level = op.u.params.mode = op.u.params.rateunit =
|
||||
op.u.params.ratemode = op.u.params.channel =
|
||||
op.u.params.cl = op.u.params.minrate = op.u.params.maxrate =
|
||||
op.u.params.weight = op.u.params.pktsize = -1;
|
||||
} else {
|
||||
warnx("invalid scheduling sub-command \"%s\"", argv[0]);
|
||||
return (EINVAL);
|
||||
}
|
||||
|
||||
/* Decode remaining arguments ... */
|
||||
errs = 0;
|
||||
for (i = 1; i < argc; i += 2) {
|
||||
const char **args = &argv[i];
|
||||
long l;
|
||||
|
||||
if (i + 1 == argc) {
|
||||
warnx("missing argument for \"%s\"", args[0]);
|
||||
errs++;
|
||||
break;
|
||||
}
|
||||
|
||||
if (!strcmp(args[0], "type")) {
|
||||
if (!strcmp(args[1], "packet"))
|
||||
op.type = SCHED_CLASS_TYPE_PACKET;
|
||||
else {
|
||||
warnx("invalid type parameter \"%s\"", args[1]);
|
||||
errs++;
|
||||
}
|
||||
|
||||
continue;
|
||||
}
|
||||
|
||||
if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
|
||||
if(!get_sched_param("minmax", args, &l))
|
||||
op.u.config.minmax = (int8_t)l;
|
||||
else {
|
||||
warnx("unknown scheduler config parameter "
|
||||
"\"%s\"", args[0]);
|
||||
errs++;
|
||||
}
|
||||
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Rest applies only to SUBCMD_PARAMS */
|
||||
if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS)
|
||||
continue;
|
||||
|
||||
if (!strcmp(args[0], "level")) {
|
||||
if (!strcmp(args[1], "cl-rl"))
|
||||
op.u.params.level = SCHED_CLASS_LEVEL_CL_RL;
|
||||
else if (!strcmp(args[1], "cl-wrr"))
|
||||
op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR;
|
||||
else if (!strcmp(args[1], "ch-rl"))
|
||||
op.u.params.level = SCHED_CLASS_LEVEL_CH_RL;
|
||||
else {
|
||||
warnx("invalid level parameter \"%s\"",
|
||||
args[1]);
|
||||
errs++;
|
||||
}
|
||||
} else if (!strcmp(args[0], "mode")) {
|
||||
if (!strcmp(args[1], "class"))
|
||||
op.u.params.mode = SCHED_CLASS_MODE_CLASS;
|
||||
else if (!strcmp(args[1], "flow"))
|
||||
op.u.params.mode = SCHED_CLASS_MODE_FLOW;
|
||||
else {
|
||||
warnx("invalid mode parameter \"%s\"", args[1]);
|
||||
errs++;
|
||||
}
|
||||
} else if (!strcmp(args[0], "rate-unit")) {
|
||||
if (!strcmp(args[1], "bits"))
|
||||
op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS;
|
||||
else if (!strcmp(args[1], "pkts"))
|
||||
op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS;
|
||||
else {
|
||||
warnx("invalid rate-unit parameter \"%s\"",
|
||||
args[1]);
|
||||
errs++;
|
||||
}
|
||||
} else if (!strcmp(args[0], "rate-mode")) {
|
||||
if (!strcmp(args[1], "relative"))
|
||||
op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL;
|
||||
else if (!strcmp(args[1], "absolute"))
|
||||
op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS;
|
||||
else {
|
||||
warnx("invalid rate-mode parameter \"%s\"",
|
||||
args[1]);
|
||||
errs++;
|
||||
}
|
||||
} else if (!get_sched_param("channel", args, &l))
|
||||
op.u.params.channel = (int8_t)l;
|
||||
else if (!get_sched_param("class", args, &l))
|
||||
op.u.params.cl = (int8_t)l;
|
||||
else if (!get_sched_param("min-rate", args, &l))
|
||||
op.u.params.minrate = (int32_t)l;
|
||||
else if (!get_sched_param("max-rate", args, &l))
|
||||
op.u.params.maxrate = (int32_t)l;
|
||||
else if (!get_sched_param("weight", args, &l))
|
||||
op.u.params.weight = (int16_t)l;
|
||||
else if (!get_sched_param("pkt-size", args, &l))
|
||||
op.u.params.pktsize = (int16_t)l;
|
||||
else {
|
||||
warnx("unknown scheduler parameter \"%s\"", args[0]);
|
||||
errs++;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Catch some logical fallacies in terms of argument combinations here
|
||||
* so we can offer more than just the EINVAL return from the driver.
|
||||
* The driver will be able to catch a lot more issues since it knows
|
||||
* the specifics of the device hardware capabilities like how many
|
||||
* channels, classes, etc. the device supports.
|
||||
*/
|
||||
if (op.type < 0) {
|
||||
warnx("sched \"type\" parameter missing");
|
||||
errs++;
|
||||
}
|
||||
if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
|
||||
if (op.u.config.minmax < 0) {
|
||||
warnx("sched config \"minmax\" parameter missing");
|
||||
errs++;
|
||||
}
|
||||
}
|
||||
if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) {
|
||||
if (op.u.params.level < 0) {
|
||||
warnx("sched params \"level\" parameter missing");
|
||||
errs++;
|
||||
}
|
||||
if (op.u.params.mode < 0) {
|
||||
warnx("sched params \"mode\" parameter missing");
|
||||
errs++;
|
||||
}
|
||||
if (op.u.params.rateunit < 0) {
|
||||
warnx("sched params \"rate-unit\" parameter missing");
|
||||
errs++;
|
||||
}
|
||||
if (op.u.params.ratemode < 0) {
|
||||
warnx("sched params \"rate-mode\" parameter missing");
|
||||
errs++;
|
||||
}
|
||||
if (op.u.params.channel < 0) {
|
||||
warnx("sched params \"channel\" missing");
|
||||
errs++;
|
||||
}
|
||||
if (op.u.params.cl < 0) {
|
||||
warnx("sched params \"class\" missing");
|
||||
errs++;
|
||||
}
|
||||
if (op.u.params.maxrate < 0 &&
|
||||
(op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
|
||||
op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
|
||||
warnx("sched params \"max-rate\" missing for "
|
||||
"rate-limit level");
|
||||
errs++;
|
||||
}
|
||||
if (op.u.params.weight < 0 &&
|
||||
op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR) {
|
||||
warnx("sched params \"weight\" missing for "
|
||||
"weighted-round-robin level");
|
||||
errs++;
|
||||
}
|
||||
if (op.u.params.pktsize < 0 &&
|
||||
(op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
|
||||
op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
|
||||
warnx("sched params \"pkt-size\" missing for "
|
||||
"rate-limit level");
|
||||
errs++;
|
||||
}
|
||||
if (op.u.params.mode == SCHED_CLASS_MODE_FLOW &&
|
||||
op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) {
|
||||
warnx("sched params mode flow needs rate-mode absolute");
|
||||
errs++;
|
||||
}
|
||||
if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL &&
|
||||
!in_range(op.u.params.maxrate, 1, 100)) {
|
||||
warnx("sched params \"max-rate\" takes "
|
||||
"percentage value(1-100) for rate-mode relative");
|
||||
errs++;
|
||||
}
|
||||
if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS &&
|
||||
!in_range(op.u.params.maxrate, 1, 10000000)) {
|
||||
warnx("sched params \"max-rate\" takes "
|
||||
"value(1-10000000) for rate-mode absolute");
|
||||
errs++;
|
||||
}
|
||||
if (op.u.params.maxrate > 0 &&
|
||||
op.u.params.maxrate < op.u.params.minrate) {
|
||||
warnx("sched params \"max-rate\" is less than "
|
||||
"\"min-rate\"");
|
||||
errs++;
|
||||
}
|
||||
}
|
||||
|
||||
if (errs > 0) {
|
||||
warnx("%d error%s in sched-class command", errs,
|
||||
errs == 1 ? "" : "s");
|
||||
return (EINVAL);
|
||||
}
|
||||
|
||||
return doit(CHELSIO_T4_SCHED_CLASS, &op);
|
||||
}
|
||||
|
||||
static int
|
||||
sched_queue(int argc, const char *argv[])
|
||||
{
|
||||
struct t4_sched_queue op = {0};
|
||||
char *p;
|
||||
long val;
|
||||
|
||||
if (argc != 3) {
|
||||
/* need "<port> <queue> <class> */
|
||||
warnx("incorrect number of arguments.");
|
||||
return (EINVAL);
|
||||
}
|
||||
|
||||
p = str_to_number(argv[0], &val, NULL);
|
||||
if (*p || val > UCHAR_MAX) {
|
||||
warnx("invalid port id \"%s\"", argv[0]);
|
||||
return (EINVAL);
|
||||
}
|
||||
op.port = (uint8_t)val;
|
||||
|
||||
if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*"))
|
||||
op.queue = -1;
|
||||
else {
|
||||
p = str_to_number(argv[1], &val, NULL);
|
||||
if (*p || val < -1) {
|
||||
warnx("invalid queue \"%s\"", argv[1]);
|
||||
return (EINVAL);
|
||||
}
|
||||
op.queue = (int8_t)val;
|
||||
}
|
||||
|
||||
if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear"))
|
||||
op.cl = -1;
|
||||
else {
|
||||
p = str_to_number(argv[2], &val, NULL);
|
||||
if (*p || val < -1) {
|
||||
warnx("invalid class \"%s\"", argv[2]);
|
||||
return (EINVAL);
|
||||
}
|
||||
op.cl = (int8_t)val;
|
||||
}
|
||||
|
||||
return doit(CHELSIO_T4_SCHED_QUEUE, &op);
|
||||
}
|
||||
|
||||
static int
|
||||
run_cmd(int argc, const char *argv[])
|
||||
{
|
||||
@ -1900,6 +2318,12 @@ run_cmd(int argc, const char *argv[])
|
||||
rc = clearstats(argc, argv);
|
||||
else if (!strcmp(cmd, "tracer"))
|
||||
rc = tracer_cmd(argc, argv);
|
||||
else if (!strcmp(cmd, "modinfo"))
|
||||
rc = modinfo(argc, argv);
|
||||
else if (!strcmp(cmd, "sched-class"))
|
||||
rc = sched_class(argc, argv);
|
||||
else if (!strcmp(cmd, "sched-queue"))
|
||||
rc = sched_queue(argc, argv);
|
||||
else {
|
||||
rc = EINVAL;
|
||||
warnx("invalid command \"%s\"", cmd);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user