Make hardware TLS send tag allocation synchronous in mlx5en(4).
Previously the send tag was setup in the background, and all packets for the given send tag were dropped until ready. Change this to be blocking behaviour so that once the setsocketopt() for enabling TLS completes, the socket is ready to send packets. Do this by simply flushing the work request which does the needed firmware programming during send tag allocation. MFC after: 1 week Sponsored by: Mellanox Technologies // Nvidia
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@ -188,7 +188,7 @@ mlx5e_tls_work(struct work_struct *work)
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priv = container_of(ptag->tls, struct mlx5e_priv, tls);
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switch (ptag->state) {
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case MLX5E_TLS_ST_SETUP:
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case MLX5E_TLS_ST_INIT:
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/* try to open TIS, if not present */
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if (ptag->tisn == 0) {
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err = mlx5_tls_open_tis(priv->mdev, 0, priv->tdn,
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@ -215,8 +215,8 @@ mlx5e_tls_work(struct work_struct *work)
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ptag->dek_index_ok = 1;
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MLX5E_TLS_TAG_LOCK(ptag);
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if (ptag->state == MLX5E_TLS_ST_SETUP)
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ptag->state = MLX5E_TLS_ST_TXRDY;
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if (ptag->state == MLX5E_TLS_ST_INIT)
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ptag->state = MLX5E_TLS_ST_SETUP;
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MLX5E_TLS_TAG_UNLOCK(ptag);
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break;
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@ -413,6 +413,10 @@ mlx5e_tls_snd_tag_alloc(struct ifnet *ifp,
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MPASS(ptag->tag.m_snd_tag.refcount == 0);
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m_snd_tag_init(&ptag->tag.m_snd_tag, ifp);
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*ppmt = &ptag->tag.m_snd_tag;
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queue_work(priv->tls.wq, &ptag->work);
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flush_work(&ptag->work);
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return (0);
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failure:
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@ -736,16 +740,11 @@ mlx5e_sq_tls_xmit(struct mlx5e_sq *sq, struct mlx5e_xmit_args *parg, struct mbuf
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MLX5E_TLS_TAG_LOCK(ptls_tag);
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switch (ptls_tag->state) {
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case MLX5E_TLS_ST_INIT:
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queue_work(sq->priv->tls.wq, &ptls_tag->work);
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ptls_tag->state = MLX5E_TLS_ST_SETUP;
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ptls_tag->expected_seq = ~mb_seq; /* force setup */
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MLX5E_TLS_TAG_UNLOCK(ptls_tag);
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return (MLX5E_TLS_FAILURE);
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case MLX5E_TLS_ST_SETUP:
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MLX5E_TLS_TAG_UNLOCK(ptls_tag);
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return (MLX5E_TLS_FAILURE);
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ptls_tag->state = MLX5E_TLS_ST_TXRDY;
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ptls_tag->expected_seq = ~mb_seq; /* force setup */
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default:
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MLX5E_TLS_TAG_UNLOCK(ptls_tag);
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break;
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