Teach ahci(4), siis(4) and ATA_CAM ata(4) wrapper report to CAM residual
I/O length on underruns, that often happens for some SCSI commands.
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1828dd7478
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78df14851a
@ -1625,12 +1625,13 @@ ahci_execute_transaction(struct ahci_slot *slot)
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/* Setup the command list entry */
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clp = (struct ahci_cmd_list *)
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(ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot));
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clp->prd_length = slot->dma.nsegs;
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clp->cmd_flags = (ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) |
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clp->cmd_flags = htole16(
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(ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) |
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(ccb->ccb_h.func_code == XPT_SCSI_IO ?
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(AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH) : 0) |
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(fis_size / sizeof(u_int32_t)) |
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(port << 12);
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(port << 12));
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clp->prd_length = htole16(slot->dma.nsegs);
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/* Special handling for Soft Reset command. */
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if ((ccb->ccb_h.func_code == XPT_ATA_IO) &&
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(ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) {
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@ -1650,7 +1651,7 @@ ahci_execute_transaction(struct ahci_slot *slot)
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clp->cmd_table_phys = htole64(ch->dma.work_bus + AHCI_CT_OFFSET +
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(AHCI_CT_SIZE * slot->slot));
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bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map,
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BUS_DMASYNC_PREWRITE);
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map,
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BUS_DMASYNC_PREREAD);
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/* Set ACTIVE bit for NCQ commands. */
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@ -1855,10 +1856,13 @@ ahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et)
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device_t dev = slot->dev;
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struct ahci_channel *ch = device_get_softc(dev);
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union ccb *ccb = slot->ccb;
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struct ahci_cmd_list *clp;
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int lastto;
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bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map,
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BUS_DMASYNC_POSTWRITE);
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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clp = (struct ahci_cmd_list *)
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(ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot));
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/* Read result registers to the result struct
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* May be incorrect if several commands finished same time,
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* so read only when sure or have to.
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@ -1893,6 +1897,16 @@ ahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et)
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res->sector_count_exp = fis[13];
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} else
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bzero(res, sizeof(*res));
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if ((ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) == 0 &&
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(ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
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ccb->ataio.resid =
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ccb->ataio.dxfer_len - le32toh(clp->bytecount);
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}
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} else {
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if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
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ccb->csio.resid =
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ccb->csio.dxfer_len - le32toh(clp->bytecount);
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}
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}
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if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
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bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map,
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@ -1517,6 +1517,15 @@ ata_cam_end_transaction(device_t dev, struct ata_request *request)
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res->sector_count = request->u.ata.count;
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res->sector_count_exp = request->u.ata.count >> 8;
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}
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if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
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if (ccb->ccb_h.func_code == XPT_ATA_IO) {
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ccb->ataio.resid =
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ccb->ataio.dxfer_len - request->donecount;
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} else {
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ccb->csio.resid =
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ccb->csio.dxfer_len - request->donecount;
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}
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}
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ata_free_request(request);
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xpt_done(ccb);
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/* Do error recovery if needed. */
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@ -1208,6 +1208,17 @@ siis_end_transaction(struct siis_slot *slot, enum siis_err_type et)
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res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13);
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} else
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bzero(res, sizeof(*res));
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if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN &&
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ch->numrslots == 1) {
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ccb->ataio.resid = ccb->ataio.dxfer_len -
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ATA_INL(ch->r_mem, SIIS_P_LRAM_SLOT(slot->slot) + 4);
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}
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} else {
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if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN &&
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ch->numrslots == 1) {
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ccb->csio.resid = ccb->csio.dxfer_len -
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ATA_INL(ch->r_mem, SIIS_P_LRAM_SLOT(slot->slot) + 4);
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}
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}
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if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
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bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map,
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