Flesh out the initial TX FIFO storage for each hardware TX queue.
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4bf404ea10
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@ -130,10 +130,43 @@ __FBSDID("$FreeBSD$");
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MALLOC_DECLARE(M_ATHDEV);
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static int
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ath_edma_setup_txfifo(struct ath_softc *sc, int qnum)
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{
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struct ath_tx_edma_fifo *te = &sc->sc_txedma[qnum];
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te->m_fifo = malloc(sizeof(struct ath_buf *) * HAL_TXFIFO_DEPTH,
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M_ATHDEV,
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M_NOWAIT | M_ZERO);
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if (te->m_fifo == NULL) {
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device_printf(sc->sc_dev, "%s: malloc failed\n",
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__func__);
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return (-ENOMEM);
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}
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/*
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* Set initial "empty" state.
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*/
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te->m_fifo_head = te->m_fifo_tail = te->m_fifo_depth = 0;
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return (0);
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}
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static int
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ath_edma_free_txfifo(struct ath_softc *sc, int qnum)
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{
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struct ath_tx_edma_fifo *te = &sc->sc_txedma[qnum];
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/* XXX TODO: actually deref the ath_buf entries? */
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free(te->m_fifo, M_ATHDEV);
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return (0);
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}
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static int
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ath_edma_dma_txsetup(struct ath_softc *sc)
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{
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int error;
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int i;
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error = ath_descdma_alloc_desc(sc, &sc->sc_txsdma,
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NULL, "txcomp", sc->sc_tx_statuslen, ATH_TXSTATUS_RING_SIZE);
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@ -145,6 +178,10 @@ ath_edma_dma_txsetup(struct ath_softc *sc)
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sc->sc_txsdma.dd_desc_paddr,
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ATH_TXSTATUS_RING_SIZE);
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for (i = 0; i < HAL_NUM_TX_QUEUES; i++) {
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ath_edma_setup_txfifo(sc, i);
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}
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return (0);
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}
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@ -152,6 +189,11 @@ ath_edma_dma_txsetup(struct ath_softc *sc)
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static int
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ath_edma_dma_txteardown(struct ath_softc *sc)
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{
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int i;
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for (i = 0; i < HAL_NUM_TX_QUEUES; i++) {
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ath_edma_free_txfifo(sc, i);
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}
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ath_descdma_cleanup(sc, &sc->sc_txsdma, NULL);
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return (0);
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@ -397,6 +397,14 @@ struct ath_rx_edma {
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struct mbuf *m_rxpending;
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};
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struct ath_tx_edma_fifo {
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struct ath_buf **m_fifo;
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int m_fifolen;
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int m_fifo_head;
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int m_fifo_tail;
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int m_fifo_depth;
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};
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struct ath_tx_methods {
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int (*xmit_setup)(struct ath_softc *sc);
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int (*xmit_teardown)(struct ath_softc *sc);
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@ -418,6 +426,7 @@ struct ath_softc {
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struct ath_rx_methods sc_rx;
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struct ath_rx_edma sc_rxedma[HAL_NUM_RX_QUEUES]; /* HP/LP queues */
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struct ath_tx_methods sc_tx;
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struct ath_tx_edma_fifo sc_txedma[HAL_NUM_TX_QUEUES];
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int sc_rx_statuslen;
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int sc_tx_desclen;
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