diff --git a/sys/dev/dc/if_dc.c b/sys/dev/dc/if_dc.c
index c26e6e03f15d..92da26b29e70 100644
--- a/sys/dev/dc/if_dc.c
+++ b/sys/dev/dc/if_dc.c
@@ -183,6 +183,8 @@ static struct dc_type dc_devs[] = {
 		"Compex RL100-TX 10/100BaseTX" },
 	{ DC_VENDORID_MX, DC_DEVICEID_987x5,
 		"Macronix 98715/98715A 10/100BaseTX" },
+	{ DC_VENDORID_MX, DC_DEVICEID_987x5,
+		"Macronix 98715AEC-C 10/100BaseTX" },
 	{ DC_VENDORID_MX, DC_DEVICEID_987x5,
 		"Macronix 98725 10/100BaseTX" },
 	{ DC_VENDORID_LO, DC_DEVICEID_82C115,
@@ -899,8 +901,9 @@ static void dc_miibus_mediainit(dev)
 }
 
 #define DC_POLY		0xEDB88320
-#define DC_BITS		9
-#define DC_BITS_PNIC_II	7
+#define DC_BITS_512	9
+#define DC_BITS_128	7
+#define DC_BITS_64	6
 
 static u_int32_t dc_crc_le(sc, addr)
 	struct dc_softc		*sc;
@@ -916,11 +919,18 @@ static u_int32_t dc_crc_le(sc, addr)
 			crc = (crc >> 1) ^ (((crc ^ data) & 1) ? DC_POLY : 0);
 	}
 
-	/* The hash table on the PNIC II is only 128 bits wide. */
-	if (DC_IS_PNICII(sc))
-		return (crc & ((1 << DC_BITS_PNIC_II) - 1));
+	/*
+	 * The hash table on the PNIC II and the MX98715AEC-C/D/E
+	 * chips is only 128 bits wide.
+	 */
+	if (sc->dc_flags & DC_128BIT_HASH)
+		return (crc & ((1 << DC_BITS_128) - 1));
 
-	return (crc & ((1 << DC_BITS) - 1));
+	/* The hash table on the MX98715BEC is only 64 bits wide. */
+	if (sc->dc_flags & DC_64BIT_HASH)
+		return (crc & ((1 << DC_BITS_64) - 1));
+
+	return (crc & ((1 << DC_BITS_512) - 1));
 }
 
 /*
@@ -1344,6 +1354,9 @@ static struct dc_type *dc_devtype(dev)
 			if (t->dc_did == DC_DEVICEID_98713_CP &&
 			    rev >= DC_REVISION_98713A)
 				t++;
+			if (t->dc_did == DC_DEVICEID_987x5 &&
+			    rev >= DC_REVISION_98715AEC_C)
+				t++;
 			if (t->dc_did == DC_DEVICEID_987x5 &&
 			    rev >= DC_REVISION_98725)
 				t++;
@@ -1552,13 +1565,23 @@ static int dc_attach(dev)
 		break;
 	case DC_DEVICEID_987x5:
 	case DC_DEVICEID_EN1217:
+		/*
+		 * Macronix MX98715AEC-C/D/E parts have only a
+		 * 128-bit hash table. We need to deal with these
+		 * in the same manner as the PNIC II so that we
+		 * get the right number of bits out of the
+		 * CRC routine.
+		 */
+		if (revision >= DC_REVISION_98715AEC_C &&
+		    revision < DC_REVISION_98725)
+			sc->dc_flags |= DC_128BIT_HASH;
 		sc->dc_type = DC_TYPE_987x5;
 		sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
 		sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
 		break;
 	case DC_DEVICEID_82C115:
 		sc->dc_type = DC_TYPE_PNICII;
-		sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
+		sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR|DC_128BIT_HASH;
 		sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
 		break;
 	case DC_DEVICEID_82C168:
diff --git a/sys/dev/dc/if_dcreg.h b/sys/dev/dc/if_dcreg.h
index 4f56a457befc..1e441d7ad30c 100644
--- a/sys/dev/dc/if_dcreg.h
+++ b/sys/dev/dc/if_dcreg.h
@@ -672,6 +672,8 @@ struct dc_softc {
 #define DC_REDUCED_MII_POLL	0x00000200
 #define DC_TX_INTR_ALWAYS	0x00000400
 #define DC_21143_NWAY		0x00000800
+#define DC_128BIT_HASH		0x00001000
+#define DC_64BIT_HASH		0x00002000
 
 /*
  * register space access macros
@@ -714,6 +716,7 @@ struct dc_softc {
 #define DC_REVISION_98713	0x00
 #define DC_REVISION_98713A	0x10
 #define DC_REVISION_98715	0x20
+#define DC_REVISION_98715AEC_C	0x25
 #define DC_REVISION_98725	0x30
 
 /*
diff --git a/sys/pci/if_dc.c b/sys/pci/if_dc.c
index c26e6e03f15d..92da26b29e70 100644
--- a/sys/pci/if_dc.c
+++ b/sys/pci/if_dc.c
@@ -183,6 +183,8 @@ static struct dc_type dc_devs[] = {
 		"Compex RL100-TX 10/100BaseTX" },
 	{ DC_VENDORID_MX, DC_DEVICEID_987x5,
 		"Macronix 98715/98715A 10/100BaseTX" },
+	{ DC_VENDORID_MX, DC_DEVICEID_987x5,
+		"Macronix 98715AEC-C 10/100BaseTX" },
 	{ DC_VENDORID_MX, DC_DEVICEID_987x5,
 		"Macronix 98725 10/100BaseTX" },
 	{ DC_VENDORID_LO, DC_DEVICEID_82C115,
@@ -899,8 +901,9 @@ static void dc_miibus_mediainit(dev)
 }
 
 #define DC_POLY		0xEDB88320
-#define DC_BITS		9
-#define DC_BITS_PNIC_II	7
+#define DC_BITS_512	9
+#define DC_BITS_128	7
+#define DC_BITS_64	6
 
 static u_int32_t dc_crc_le(sc, addr)
 	struct dc_softc		*sc;
@@ -916,11 +919,18 @@ static u_int32_t dc_crc_le(sc, addr)
 			crc = (crc >> 1) ^ (((crc ^ data) & 1) ? DC_POLY : 0);
 	}
 
-	/* The hash table on the PNIC II is only 128 bits wide. */
-	if (DC_IS_PNICII(sc))
-		return (crc & ((1 << DC_BITS_PNIC_II) - 1));
+	/*
+	 * The hash table on the PNIC II and the MX98715AEC-C/D/E
+	 * chips is only 128 bits wide.
+	 */
+	if (sc->dc_flags & DC_128BIT_HASH)
+		return (crc & ((1 << DC_BITS_128) - 1));
 
-	return (crc & ((1 << DC_BITS) - 1));
+	/* The hash table on the MX98715BEC is only 64 bits wide. */
+	if (sc->dc_flags & DC_64BIT_HASH)
+		return (crc & ((1 << DC_BITS_64) - 1));
+
+	return (crc & ((1 << DC_BITS_512) - 1));
 }
 
 /*
@@ -1344,6 +1354,9 @@ static struct dc_type *dc_devtype(dev)
 			if (t->dc_did == DC_DEVICEID_98713_CP &&
 			    rev >= DC_REVISION_98713A)
 				t++;
+			if (t->dc_did == DC_DEVICEID_987x5 &&
+			    rev >= DC_REVISION_98715AEC_C)
+				t++;
 			if (t->dc_did == DC_DEVICEID_987x5 &&
 			    rev >= DC_REVISION_98725)
 				t++;
@@ -1552,13 +1565,23 @@ static int dc_attach(dev)
 		break;
 	case DC_DEVICEID_987x5:
 	case DC_DEVICEID_EN1217:
+		/*
+		 * Macronix MX98715AEC-C/D/E parts have only a
+		 * 128-bit hash table. We need to deal with these
+		 * in the same manner as the PNIC II so that we
+		 * get the right number of bits out of the
+		 * CRC routine.
+		 */
+		if (revision >= DC_REVISION_98715AEC_C &&
+		    revision < DC_REVISION_98725)
+			sc->dc_flags |= DC_128BIT_HASH;
 		sc->dc_type = DC_TYPE_987x5;
 		sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
 		sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
 		break;
 	case DC_DEVICEID_82C115:
 		sc->dc_type = DC_TYPE_PNICII;
-		sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
+		sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR|DC_128BIT_HASH;
 		sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
 		break;
 	case DC_DEVICEID_82C168:
diff --git a/sys/pci/if_dcreg.h b/sys/pci/if_dcreg.h
index 4f56a457befc..1e441d7ad30c 100644
--- a/sys/pci/if_dcreg.h
+++ b/sys/pci/if_dcreg.h
@@ -672,6 +672,8 @@ struct dc_softc {
 #define DC_REDUCED_MII_POLL	0x00000200
 #define DC_TX_INTR_ALWAYS	0x00000400
 #define DC_21143_NWAY		0x00000800
+#define DC_128BIT_HASH		0x00001000
+#define DC_64BIT_HASH		0x00002000
 
 /*
  * register space access macros
@@ -714,6 +716,7 @@ struct dc_softc {
 #define DC_REVISION_98713	0x00
 #define DC_REVISION_98713A	0x10
 #define DC_REVISION_98715	0x20
+#define DC_REVISION_98715AEC_C	0x25
 #define DC_REVISION_98725	0x30
 
 /*