Add minimal support for SGI Altix l1 console -- a SAL-based character
device. This may not be here to stay, because it's not a real serial device. Then again, who cares?
This commit is contained in:
Marcel Moolenaar
parent
dbf9f56d67
commit
79e221e34f
@ -60,6 +60,7 @@ dev/syscons/scterm-teken.c optional sc
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dev/syscons/scvgarndr.c optional sc vga
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dev/syscons/scvtb.c optional sc
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dev/uart/uart_cpu_ia64.c optional uart
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dev/uart/uart_dev_sgisn.c optional uart
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dev/acpica/acpi_if.m standard
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ia64/acpica/OsdEnvironment.c optional acpi
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ia64/acpica/acpi_machdep.c optional acpi
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@ -67,6 +67,7 @@ struct uart_class;
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extern struct uart_class uart_ns8250_class __attribute__((weak));
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extern struct uart_class uart_quicc_class __attribute__((weak));
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extern struct uart_class uart_sab82532_class __attribute__((weak));
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extern struct uart_class uart_sgisn_class __attribute__((weak));
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extern struct uart_class uart_z8530_class __attribute__((weak));
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#ifdef PC98
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@ -65,6 +65,8 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
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unsigned int i;
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class = &uart_ns8250_class;
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if (class == NULL)
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class = &uart_sgisn_class;
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if (class == NULL)
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return (ENXIO);
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291
sys/dev/uart/uart_dev_sgisn.c
Normal file
291
sys/dev/uart/uart_dev_sgisn.c
Normal file
@ -0,0 +1,291 @@
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/*-
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* Copyright (c) 2010 Marcel Moolenaar
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/endian.h>
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#include <machine/bus.h>
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#include <machine/sal.h>
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_cpu.h>
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#include <dev/uart/uart_bus.h>
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#include "uart_if.h"
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#define SAL_SGISN_PUTC 0x02000021
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#define SAL_SGISN_GETC 0x02000022
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#define SAL_SGISN_POLL 0x02000026
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/*
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* Low-level UART interface.
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*/
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static int sgisn_probe(struct uart_bas *bas);
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static void sgisn_init(struct uart_bas *bas, int, int, int, int);
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static void sgisn_term(struct uart_bas *bas);
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static void sgisn_putc(struct uart_bas *bas, int);
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static int sgisn_rxready(struct uart_bas *bas);
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static int sgisn_getc(struct uart_bas *bas, struct mtx *);
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static struct uart_ops uart_sgisn_ops = {
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.probe = sgisn_probe,
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.init = sgisn_init,
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.term = sgisn_term,
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.putc = sgisn_putc,
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.rxready = sgisn_rxready,
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.getc = sgisn_getc,
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};
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static int
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sgisn_probe(struct uart_bas *bas)
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{
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/* XXX Check that we're running on the Altix 350 */
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return (0);
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}
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static void
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sgisn_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
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int parity)
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{
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}
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static void
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sgisn_term(struct uart_bas *bas)
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{
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}
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static void
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sgisn_putc(struct uart_bas *bas, int c)
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{
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struct ia64_sal_result result;
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result = ia64_sal_entry(SAL_SGISN_PUTC, c, 0, 0, 0, 0, 0, 0);
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}
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static int
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sgisn_rxready(struct uart_bas *bas)
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{
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struct ia64_sal_result result;
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result = ia64_sal_entry(SAL_SGISN_POLL, 0, 0, 0, 0, 0, 0, 0);
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return (!result.sal_status && result.sal_result[0]);
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}
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static int
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sgisn_getc(struct uart_bas *bas, struct mtx *hwmtx)
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{
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struct ia64_sal_result result;
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result = ia64_sal_entry(SAL_SGISN_GETC, 0, 0, 0, 0, 0, 0, 0);
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return ((!result.sal_status) ? result.sal_result[0] : -1);
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}
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/*
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* High-level UART interface.
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*/
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struct sgisn_softc {
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struct uart_softc base;
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};
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static int sgisn_bus_attach(struct uart_softc *);
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static int sgisn_bus_detach(struct uart_softc *);
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static int sgisn_bus_flush(struct uart_softc *, int);
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static int sgisn_bus_getsig(struct uart_softc *);
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static int sgisn_bus_ioctl(struct uart_softc *, int, intptr_t);
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static int sgisn_bus_ipend(struct uart_softc *);
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static int sgisn_bus_param(struct uart_softc *, int, int, int, int);
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static int sgisn_bus_probe(struct uart_softc *);
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static int sgisn_bus_receive(struct uart_softc *);
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static int sgisn_bus_setsig(struct uart_softc *, int);
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static int sgisn_bus_transmit(struct uart_softc *);
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static kobj_method_t sgisn_methods[] = {
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KOBJMETHOD(uart_attach, sgisn_bus_attach),
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KOBJMETHOD(uart_detach, sgisn_bus_detach),
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KOBJMETHOD(uart_flush, sgisn_bus_flush),
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KOBJMETHOD(uart_getsig, sgisn_bus_getsig),
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KOBJMETHOD(uart_ioctl, sgisn_bus_ioctl),
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KOBJMETHOD(uart_ipend, sgisn_bus_ipend),
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KOBJMETHOD(uart_param, sgisn_bus_param),
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KOBJMETHOD(uart_probe, sgisn_bus_probe),
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KOBJMETHOD(uart_receive, sgisn_bus_receive),
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KOBJMETHOD(uart_setsig, sgisn_bus_setsig),
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KOBJMETHOD(uart_transmit, sgisn_bus_transmit),
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{ 0, 0 }
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};
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struct uart_class uart_sgisn_class = {
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"sgisn",
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sgisn_methods,
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sizeof(struct sgisn_softc),
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.uc_ops = &uart_sgisn_ops,
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.uc_range = 2,
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.uc_rclk = 0
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};
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#define SIGCHG(c, i, s, d) \
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if (c) { \
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i |= (i & s) ? s : s | d; \
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} else { \
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i = (i & s) ? (i & ~s) | d : i; \
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}
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static int
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sgisn_bus_attach(struct uart_softc *sc)
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{
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sc->sc_rxfifosz = 1;
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sc->sc_txfifosz = 1;
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(void)sgisn_bus_getsig(sc);
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return (0);
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}
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static int
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sgisn_bus_detach(struct uart_softc *sc)
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{
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return (0);
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}
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static int
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sgisn_bus_flush(struct uart_softc *sc, int what)
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{
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return (0);
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}
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static int
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sgisn_bus_getsig(struct uart_softc *sc)
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{
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uint32_t new, old, sig;
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uint32_t dummy;
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do {
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old = sc->sc_hwsig;
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sig = old;
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/* XXX SIGNALS */
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dummy = 0;
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SIGCHG(dummy, sig, SER_CTS, SER_DCTS);
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SIGCHG(dummy, sig, SER_DCD, SER_DDCD);
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SIGCHG(dummy, sig, SER_DSR, SER_DDSR);
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new = sig & ~SER_MASK_DELTA;
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} while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));
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return (sig);
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}
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static int
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sgisn_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
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{
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int error;
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error = 0;
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switch (request) {
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case UART_IOCTL_BREAK:
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break;
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default:
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error = EINVAL;
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break;
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}
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return (error);
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}
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static int
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sgisn_bus_ipend(struct uart_softc *sc)
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{
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int ipend;
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ipend = 0;
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return (ipend);
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}
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static int
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sgisn_bus_param(struct uart_softc *sc, int baudrate, int databits,
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int stopbits, int parity)
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{
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return (0);
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}
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static int
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sgisn_bus_probe(struct uart_softc *sc)
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{
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char buf[80];
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int error;
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error = sgisn_probe(&sc->sc_bas);
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if (error)
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return (error);
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snprintf(buf, sizeof(buf), "SGI L1");
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device_set_desc_copy(sc->sc_dev, buf);
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return (0);
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}
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static int
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sgisn_bus_receive(struct uart_softc *sc)
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{
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return (0);
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}
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static int
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sgisn_bus_setsig(struct uart_softc *sc, int sig)
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{
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struct uart_bas *bas;
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uint32_t new, old;
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bas = &sc->sc_bas;
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do {
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old = sc->sc_hwsig;
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new = old;
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if (sig & SER_DDTR) {
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SIGCHG(sig & SER_DTR, new, SER_DTR,
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SER_DDTR);
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}
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if (sig & SER_DRTS) {
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SIGCHG(sig & SER_RTS, new, SER_RTS,
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SER_DRTS);
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}
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} while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));
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/* XXX SIGNALS */
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return (0);
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}
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static int
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sgisn_bus_transmit(struct uart_softc *sc)
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{
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return (0);
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}
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@ -51,6 +51,7 @@ __FBSDID("$FreeBSD$");
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static struct uart_class *uart_classes[] = {
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&uart_ns8250_class,
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&uart_sab82532_class,
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&uart_sgisn_class,
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&uart_z8530_class,
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};
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static size_t uart_nclasses = sizeof(uart_classes) / sizeof(uart_classes[0]);
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