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Spelling fix for interupt -> interrupt

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This commit is contained in:
kevlo 2007-10-12 06:03:46 +00:00
parent a7a6cc62cb
commit 7a9f1e285b
29 changed files with 41 additions and 41 deletions
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4
sys/arm/xscale/ixp425/ixp425_qmgr.c
View File

@ -341,7 +341,7 @@ ixpqmgr_qconfig(int qId, int qEntries, int ne, int nf, int srcSel,
*/
sc->aqmFreeSramAddress += (qi->qSizeInWords * sizeof(uint32_t));
/* Set the interupt source if this queue is in the range 0-31 */
/* Set the interrupt source if this queue is in the range 0-31 */
if (qId < IX_QMGR_MIN_QUEUPP_QID)
aqm_srcsel_write(sc, qId, srcSel);
@ -604,7 +604,7 @@ ixpqmgr_notify_enable(int qId, int srcSel)
/* Calculate the checkMask and checkValue for this q */
aqm_calc_statuscheck(sc, qId, srcSel);
#endif
/* Set the interupt source if this queue is in the range 0-31 */
/* Set the interrupt source if this queue is in the range 0-31 */
if (qId < IX_QMGR_MIN_QUEUPP_QID)
aqm_srcsel_write(sc, qId, srcSel);

2
sys/compat/linprocfs/linprocfs.c
View File

@ -114,7 +114,7 @@ __FBSDID("$FreeBSD$");
*
* The linux procfs state field displays one of the characters RSDZTW to
* denote running, sleeping in an interruptible wait, waiting in an
* uninteruptible disk sleep, a zombie process, process is being traced
* uninterruptible disk sleep, a zombie process, process is being traced
* or stopped, or process is paging respectively.
*
* Our struct kinfo_proc contains the variable ki_stat which contains a

6
sys/dev/cm/smc90cx6.c
View File

@ -592,7 +592,7 @@ cm_srint_locked(vsc)
sc->sc_rx_act = buffer;
sc->sc_intmask |= CM_RI;
/* this also clears the RI flag interupt: */
/* this also clears the RI flag interrupt: */
PUTREG(CMCMD, CM_RXBC(buffer));
PUTREG(CMSTAT, sc->sc_intmask);
@ -779,7 +779,7 @@ cmintr(arg)
* configured sender)
*/
log(LOG_WARNING,
"%s: spurious RX interupt or sender 0 "
"%s: spurious RX interrupt or sender 0 "
" (ignored)\n", ifp->if_xname);
/*
* restart receiver on same buffer.
@ -797,7 +797,7 @@ cmintr(arg)
/*
* Start receiver on other receive
* buffer. This also clears the RI
* interupt flag.
* interrupt flag.
*/
PUTREG(CMCMD, CM_RXBC(buffer));
/* in RX intr, so mask is ok for RX */

2
sys/dev/ctau/if_ct.c
View File

@ -272,7 +272,7 @@ static void ct_led_off (void *arg)
}
/*
* Activate interupt handler from DDK.
* Activate interrupt handler from DDK.
*/
static void ct_intr (void *arg)
{

2
sys/dev/cx/if_cx.c
View File

@ -358,7 +358,7 @@ static void cx_led_off (void *arg)
}
/*
* Activate interupt handler from DDK.
* Activate interrupt handler from DDK.
*/
static void cx_intr (void *arg)
{

2
sys/dev/idt/idt_pci.c
View File

@ -219,7 +219,7 @@ idt_detach(device_t dev)
idt_device_stop(sc); /* Stop the device */
/*
* Lock out all device interupts.
* Lock out all device interrupts.
*/
DEVICE_LOCK(&sc->iu_cmn);
idt_free(dev);

4
sys/dev/isp/isp_target.c
View File

@ -1332,7 +1332,7 @@ isp_handle_ctio(ispsoftc_t *isp, ct_entry_t *ct)
* Bus Device Reset message received or the SCSI Bus has
* been Reset; the firmware has gone to Bus Free.
*
* The firmware generates an async mailbox interupt to
* The firmware generates an async mailbox interrupt to
* notify us of this and returns outstanding CTIOs with this
* status. These CTIOs are handled in that same way as
* CT_ABORTED ones, so just fall through here.
@ -1486,7 +1486,7 @@ isp_handle_ctio2(ispsoftc_t *isp, ct2_entry_t *ct)
/*
* Target Reset function received.
*
* The firmware generates an async mailbox interupt to
* The firmware generates an async mailbox interrupt to
* notify us of this and returns outstanding CTIOs with this
* status. These CTIOs are handled in that same way as
* CT_ABORTED ones, so just fall through here.

6
sys/dev/mpt/mpt.c
View File

@ -1356,7 +1356,7 @@ mpt_send_handshake_cmd(struct mpt_softc *mpt, size_t len, void *cmd)
len = (len + 3) >> 2;
data32 = cmd;
/* Clear any left over pending doorbell interupts */
/* Clear any left over pending doorbell interrupts */
if (MPT_DB_INTR(mpt_rd_intr(mpt)))
mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
@ -2095,7 +2095,7 @@ mpt_send_event_request(struct mpt_softc *mpt, int onoff)
}
/*
* Un-mask the interupts on the chip.
* Un-mask the interrupts on the chip.
*/
void
mpt_enable_ints(struct mpt_softc *mpt)
@ -2105,7 +2105,7 @@ mpt_enable_ints(struct mpt_softc *mpt)
}
/*
* Mask the interupts on the chip.
* Mask the interrupts on the chip.
*/
void
mpt_disable_ints(struct mpt_softc *mpt)

2
sys/dev/my/if_my.c
View File

@ -1441,7 +1441,7 @@ my_start_locked(struct ifnet * ifp)
/*
* Place the request for the upload interrupt in the last descriptor
* in the chain. This way, if we're chaining several packets at once,
* we'll only get an interupt once for the whole chain rather than
* we'll only get an interrupt once for the whole chain rather than
* once for each packet.
*/
MY_TXCTL(cur_tx) |= MY_TXIC;

2
sys/dev/sio/sio.c
View File

@ -600,7 +600,7 @@ sioprobe(dev, xrid, rclk, noprobe)
}
/*
* Enable the interrupt gate and disable device interupts. This
* Enable the interrupt gate and disable device interrupts. This
* should leave the device driving the interrupt line low and
* guarantee an edge trigger if an interrupt can be generated.
*/

8
sys/dev/sound/isa/ad1816.c
View File

@ -128,22 +128,22 @@ ad1816_intr(void *arg)
unsigned char c, served = 0;
ad1816_lock(ad1816);
/* get interupt status */
/* get interrupt status */
c = io_rd(ad1816, AD1816_INT);
/* check for stray interupts */
/* check for stray interrupts */
if (c & ~(AD1816_INTRCI | AD1816_INTRPI)) {
printf("pcm: stray int (%x)\n", c);
c &= AD1816_INTRCI | AD1816_INTRPI;
}
/* check for capture interupt */
/* check for capture interrupt */
if (sndbuf_runsz(ad1816->rch.buffer) && (c & AD1816_INTRCI)) {
ad1816_unlock(ad1816);
chn_intr(ad1816->rch.channel);
ad1816_lock(ad1816);
served |= AD1816_INTRCI; /* cp served */
}
/* check for playback interupt */
/* check for playback interrupt */
if (sndbuf_runsz(ad1816->pch.buffer) && (c & AD1816_INTRPI)) {
ad1816_unlock(ad1816);
chn_intr(ad1816->pch.channel);

2
sys/dev/sound/isa/ad1816.h
View File

@ -34,7 +34,7 @@
/* AD1816 register macros */
#define AD1816_ALE 0 /* indirect reg access */
#define AD1816_INT 1 /* interupt status */
#define AD1816_INT 1 /* interrupt status */
#define AD1816_LOW 2 /* indirect low byte */
#define AD1816_HIGH 3 /* indirect high byte */

2
sys/dev/sound/pci/atiixp.c
View File

@ -902,7 +902,7 @@ atiixp_intr(void *p)
detected_codecs = status & CODEC_CHECK_BITS;
sc->codec_not_ready_bits |= detected_codecs;
/* disable detected interupt sources */
/* disable detected interrupt sources */
enable = atiixp_rd(sc, ATI_REG_IER);
enable &= ~detected_codecs;
atiixp_wr(sc, ATI_REG_IER, enable);

2
sys/dev/sound/pci/emu10kx.c
View File

@ -950,7 +950,7 @@ emu_intr_unregister(struct emu_sc_info *sc, int hnumber)
sc->ihandler[hnumber].softc = NULL;
sc->ihandler[hnumber].irq_func = NULL;
/* other interupt handlers may use this INTE value */
/* other interrupt handlers may use this INTE value */
for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
if (sc->ihandler[i].inte_mask != 0)
x |= sc->ihandler[i].inte_mask;

2
sys/dev/sound/pci/envy24.c
View File

@ -2461,7 +2461,7 @@ envy24_alloc_resource(struct sc_info *sc)
pci_read_config(sc->dev, PCIR_MT, 4));
#endif
/* allocate interupt resource */
/* allocate interrupt resource */
sc->irqid = 0;
sc->irq = bus_alloc_resource(sc->dev, SYS_RES_IRQ, &sc->irqid,
0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);

2
sys/dev/sound/pci/envy24ht.c
View File

@ -2416,7 +2416,7 @@ envy24ht_alloc_resource(struct sc_info *sc)
pci_read_config(sc->dev, PCIR_MT, 4));
#endif
/* allocate interupt resource */
/* allocate interrupt resource */
sc->irqid = 0;
sc->irq = bus_alloc_resource(sc->dev, SYS_RES_IRQ, &sc->irqid,
0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);

2
sys/dev/sound/sbus/cs4231.c
View File

@ -622,7 +622,7 @@ cs4231_power_reset(struct cs4231_softc *sc, int how)
/* turn on cs4231 mode */
cs4231_write(sc, CS_MISC_INFO,
cs4231_read(sc, CS_MISC_INFO) | CS_MODE2);
/* enable interupts & clear CSR */
/* enable interrupts & clear CSR */
cs4231_write(sc, CS_PIN_CONTROL,
cs4231_read(sc, CS_PIN_CONTROL) | INTERRUPT_ENABLE);
CS_WRITE(sc, CS4231_STATUS, 0);

2
sys/i4b/layer1/isic/i4b_avm_a1.c
View File

@ -251,7 +251,7 @@ isic_probe_avma1(device_t dev)
/* get the irq number */
sc->sc_irq = rman_get_start(sc->sc_resources.irq);
/* register interupt routine */
/* register interrupt routine */
if (bus_setup_intr(dev, sc->sc_resources.irq, INTR_TYPE_NET, NULL,
(void(*)(void *))(isicintr), sc, &ih) != 0)
{

2
sys/i4b/layer1/isic/i4b_elsa_pcc16.c
View File

@ -354,7 +354,7 @@ isic_probe_Epcc16(device_t dev)
break;
}
/* register interupt routine */
/* register interrupt routine */
bus_setup_intr(dev,sc->sc_resources.irq,INTR_TYPE_NET,
NULL, (void(*)(void *))(isicintr),
sc,&ih);

4
sys/i4b/layer1/isic/i4b_isic.c
View File

@ -88,7 +88,7 @@ struct i4b_l1mux_func isic_l1mux_func = {
void
isicintr(struct l1_softc *sc)
{
if(sc->sc_ipac == 0) /* HSCX/ISAC interupt routine */
if(sc->sc_ipac == 0) /* HSCX/ISAC interrupt routine */
{
u_char was_hscx_irq = 0;
u_char was_isac_irq = 0;
@ -455,7 +455,7 @@ isic_detach_common(device_t dev)
if(sc->sc_resources.irq)
{
/* tear down interupt handler */
/* tear down interrupt handler */
bus_teardown_intr(dev, sc->sc_resources.irq,
(void(*)(void *))isicintr);

4
sys/i4b/layer1/isic/i4b_itk_ix1.c
View File

@ -273,10 +273,10 @@ isic_probe_itkix1(device_t dev)
printf("done.\n");
#endif
/* register interupt routine */
/* register interrupt routine */
#if defined(ITK_PROBE_DEBUG)
printf("Setting up access interupt...");
printf("Setting up access interrupt...");
#endif
if (bus_setup_intr(dev, sc->sc_resources.irq, INTR_TYPE_NET, NULL,

2
sys/i4b/layer1/isic/i4b_tel_s016.c
View File

@ -300,7 +300,7 @@ isic_probe_s016(device_t dev)
return ENXIO;
}
/* register interupt routine */
/* register interrupt routine */
if (bus_setup_intr(dev, sc->sc_resources.irq, INTR_TYPE_NET, NULL,
(void(*)(void *))(isicintr), sc, &ih) != 0)

2
sys/i4b/layer1/isic/i4b_tel_s0163.c
View File

@ -338,7 +338,7 @@ isic_probe_s0163(device_t dev)
break;
}
/* register interupt routine */
/* register interrupt routine */
if (bus_setup_intr(dev, sc->sc_resources.irq, INTR_TYPE_NET, NULL,
(void(*)(void *))(isicintr), sc, &ih) != 0)
{

2
sys/i4b/layer1/isic/i4b_tel_s08.c
View File

@ -264,7 +264,7 @@ isic_probe_s08(device_t dev)
break;
}
/* register interupt routine */
/* register interrupt routine */
bus_setup_intr(dev, sc->sc_resources.irq,
INTR_TYPE_NET,

2
sys/netinet/sctp_output.c
View File

@ -11693,7 +11693,7 @@ sctp_lower_sosend(struct socket *so,
} else {
/*
* Just got locked to this guy in case of an
* interupt.
* interrupt.
*/
strm->last_msg_incomplete = 1;
asoc->stream_locked = 1;

2
sys/netinet/sctputil.c
View File

@ -5575,7 +5575,7 @@ sctp_sorecvmsg(struct socket *so,
if (TAILQ_NEXT(control, next) == NULL) {
/*
* If we don't have a next we need a
* lock, if there is a next interupt
* lock, if there is a next interrupt
* is filling ahead of us and we
* don't need a lock to remove this
* guy (which is the head of the

2
sys/pc98/cbus/sio.c
View File

@ -1069,7 +1069,7 @@ sioprobe(dev, xrid, rclk, noprobe)
}
/*
* Enable the interrupt gate and disable device interupts. This
* Enable the interrupt gate and disable device interrupts. This
* should leave the device driving the interrupt line low and
* guarantee an edge trigger if an interrupt can be generated.
*/

2
sys/pci/if_wb.c
View File

@ -1502,7 +1502,7 @@ wb_start_locked(ifp)
* Place the request for the upload interrupt
* in the last descriptor in the chain. This way, if
* we're chaining several packets at once, we'll only
* get an interupt once for the whole chain rather than
* get an interrupt once for the whole chain rather than
* once for each packet.
*/
WB_TXCTL(cur_tx) |= WB_TXCTL_FINT;

4
sys/pci/if_xl.c
View File

@ -2628,7 +2628,7 @@ xl_start_locked(struct ifnet *ifp)
* Place the request for the upload interrupt
* in the last descriptor in the chain. This way, if
* we're chaining several packets at once, we'll only
* get an interupt once for the whole chain rather than
* get an interrupt once for the whole chain rather than
* once for each packet.
*/
cur_tx->xl_ptr->xl_status = htole32(le32toh(cur_tx->xl_ptr->xl_status) |
@ -2748,7 +2748,7 @@ xl_start_90xB_locked(struct ifnet *ifp)
* Place the request for the upload interrupt
* in the last descriptor in the chain. This way, if
* we're chaining several packets at once, we'll only
* get an interupt once for the whole chain rather than
* get an interrupt once for the whole chain rather than
* once for each packet.
*/
cur_tx->xl_ptr->xl_status = htole32(le32toh(cur_tx->xl_ptr->xl_status) |