arm64: mvebu_pinctrl: Add driver for Marvell Pinmux Controller
Add a driver compatible with Marvell mvebu-pinctrl and add ap806-pinctrl
support.
Sponsored by: Rubicon Communications, LCC ("Netgate")
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sys/arm/mv/mvebu_pinctrl.c
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246
sys/arm/mv/mvebu_pinctrl.c
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2018 Rubicon Communications, LLC (Netgate)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <machine/intr.h>
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#include <dev/fdt/simplebus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/fdt/fdt_pinctrl.h>
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#include "opt_soc.h"
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#define PINS_PER_REG 8
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#define BITS_PER_PIN 4
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#define PINS_MASK 0xf
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#define MAX_PIN_FUNC 5
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struct mv_pins {
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const char *name;
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const char *functions[MAX_PIN_FUNC];
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};
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struct mv_padconf {
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const struct mv_pins *pins;
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size_t npins;
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};
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#ifdef SOC_MARVELL_8K
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const static struct mv_pins ap806_pins[] = {
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{"mpp0", {"gpio", "sdio", NULL, "spi0"}},
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{"mpp1", {"gpio", "sdio", NULL, "spi0"}},
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{"mpp2", {"gpio", "sdio", NULL, "spi0"}},
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{"mpp3", {"gpio", "sdio", NULL, "spi0"}},
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{"mpp4", {"gpio", "sdio", NULL, "i2c0"}},
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{"mpp5", {"gpio", "sdio", NULL, "i2c0"}},
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{"mpp6", {"gpio", "sdio", NULL, NULL}},
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{"mpp7", {"gpio", "sdio", NULL, "uart1"}},
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{"mpp8", {"gpio", "sdio", NULL, "uart1"}},
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{"mpp9", {"gpio", "sdio", NULL, "spi0"}},
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{"mpp10", {"gpio", "sdio", NULL, NULL}},
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{"mpp11", {"gpio", NULL, NULL, "uart0"}},
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{"mpp12", {"gpio", "sdio", "sdio", NULL}},
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{"mpp13", {"gpio", NULL, NULL}},
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{"mpp14", {"gpio", NULL, NULL}},
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{"mpp15", {"gpio", NULL, NULL}},
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{"mpp16", {"gpio", NULL, NULL}},
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{"mpp17", {"gpio", NULL, NULL}},
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{"mpp18", {"gpio", NULL, NULL}},
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{"mpp19", {"gpio", NULL, NULL, "uart0", "sdio"}},
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};
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const struct mv_padconf ap806_padconf = {
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.npins = nitems(ap806_pins),
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.pins = ap806_pins,
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};
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#endif
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struct mv_pinctrl_softc {
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device_t dev;
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struct resource *res;
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struct mv_padconf *padconf;
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};
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static struct resource_spec mv_pinctrl_res_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE },
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{ -1, 0 }
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};
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static struct ofw_compat_data compat_data[] = {
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#ifdef SOC_MARVELL_8K
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{"marvell,ap806-pinctrl", (uintptr_t)&ap806_padconf},
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#endif
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{NULL, 0}
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};
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#define RD4(sc, reg) bus_read_4((sc)->res, (reg))
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#define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
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static void
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mv_pinctrl_configure_pin(struct mv_pinctrl_softc *sc, uint32_t pin,
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uint32_t function)
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{
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uint32_t offset, shift, reg;
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offset = (pin / PINS_PER_REG) * BITS_PER_PIN;
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shift = (pin % PINS_PER_REG) * BITS_PER_PIN;
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reg = RD4(sc, offset);
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reg &= ~(PINS_MASK << shift);
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reg |= function << shift;
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WR4(sc, offset, reg);
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}
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static int
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mv_pinctrl_configure_pins(device_t dev, phandle_t cfgxref)
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{
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struct mv_pinctrl_softc *sc;
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phandle_t node;
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char *function;
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const char **pins;
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int i, pin_num, pin_func, npins;
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sc = device_get_softc(dev);
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node = OF_node_from_xref(cfgxref);
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if (OF_getprop_alloc(node, "marvell,function",
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(void **)&function) == -1)
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return (ENOMEM);
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npins = ofw_bus_string_list_to_array(node, "marvell,pins", &pins);
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if (npins == -1)
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return (ENOMEM);
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for (i = 0; i < npins; i++) {
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for (pin_num = 0; pin_num < sc->padconf->npins; pin_num++) {
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if (strcmp(pins[i], sc->padconf->pins[pin_num].name) == 0)
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break;
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}
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if (pin_num == sc->padconf->npins)
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continue;
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for (pin_func = 0; pin_func < MAX_PIN_FUNC; pin_func++)
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if (sc->padconf->pins[pin_num].functions[pin_func] &&
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strcmp(function, sc->padconf->pins[pin_num].functions[pin_func]) == 0)
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break;
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if (pin_func == MAX_PIN_FUNC)
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continue;
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mv_pinctrl_configure_pin(sc, pin_num, pin_func);
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}
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OF_prop_free(pins);
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return (0);
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}
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static int
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mv_pinctrl_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Marvell Pinctrl controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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mv_pinctrl_attach(device_t dev)
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{
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struct mv_pinctrl_softc *sc;
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phandle_t node;
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sc = device_get_softc(dev);
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sc->dev = dev;
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sc->padconf = (struct mv_padconf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data;
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if (bus_alloc_resources(dev, mv_pinctrl_res_spec, &sc->res) != 0) {
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device_printf(dev, "cannot allocate resources for device\n");
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return (ENXIO);
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}
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node = ofw_bus_get_node(dev);
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fdt_pinctrl_register(dev, "marvell,pins");
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fdt_pinctrl_configure_tree(dev);
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return (0);
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}
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static int
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mv_pinctrl_detach(device_t dev)
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{
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return (EBUSY);
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}
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static device_method_t mv_pinctrl_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, mv_pinctrl_probe),
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DEVMETHOD(device_attach, mv_pinctrl_attach),
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DEVMETHOD(device_detach, mv_pinctrl_detach),
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/* fdt_pinctrl interface */
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DEVMETHOD(fdt_pinctrl_configure,mv_pinctrl_configure_pins),
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DEVMETHOD_END
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};
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static devclass_t mv_pinctrl_devclass;
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static driver_t mv_pinctrl_driver = {
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"mv_pinctrl",
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mv_pinctrl_methods,
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sizeof(struct mv_pinctrl_softc),
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};
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EARLY_DRIVER_MODULE(mv_pinctrl, simplebus, mv_pinctrl_driver,
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mv_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
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@ -199,11 +199,12 @@ device muge
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device smcphy
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device smsc
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# GPIO
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# GPIO / PINCTRL
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device aw_gpio # Allwinner GPIO controller
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device gpio
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device gpioled
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device fdt_pinctrl
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device mvebu_pinctrl # Marvell Pinmux Controller
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# I2C
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device aw_rsb # Allwinner Reduced Serial Bus
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@ -89,6 +89,7 @@ arm/broadcom/bcm2835/bcm2835_vcio.c optional soc_brcm_bcm2837 fdt
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arm/broadcom/bcm2835/bcm2835_wdog.c optional soc_brcm_bcm2837 fdt
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arm/broadcom/bcm2835/bcm2836.c optional soc_brcm_bcm2837 fdt
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arm/broadcom/bcm2835/bcm283x_dwc_fdt.c optional dwcotg fdt soc_brcm_bcm2837
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arm/mv/mvebu_pinctrl.c optional mvebu_pinctrl fdt
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arm/mv/armada38x/armada38x_rtc.c optional mv_rtc fdt
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arm/xilinx/uart_dev_cdnc.c optional uart soc_xilinx_zynq
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arm64/acpica/acpi_machdep.c optional acpi
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